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参数资料
| 型号： | MB91F355APMT |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 50 MHz, RISC MICROCONTROLLER, PQFP176 |
| 封装： | 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176 |
| 文件页数： | 24/112页 |
| 文件大小： | 1095K |
| 代理商： | MB91F355APMT |
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MB91350A Series
19
Notes on not using the sub clock
When no oscillator is connected to the X0A and X1A pins, pull down the X0A pin and open the X1A pin.
Treatment of NC and OPEN pins
Pins marked as NC or OPEN must be left open-circuit.
Mode pins (MD0 to MD2)
These pins should be connected directly to VCC or VSS. To prevent the device erroneously switching to test
mode due to noise, design the printed circuit board such that the distance between the mode pins and VCC or
VSS is as short as possible and the connection impedance is low.
Operation at start-up
The INIT pin must be at Low level when the power supply is turned on.
Immediately after the power supply is turned on, hold the Low level input to the INIT pin for the settling time
required for the oscillator circuit to take the oscillation stabilization wait time for the oscillator circuit. (For INIT
via the INIT pin, the oscillation stabilization wait time setting is initialized to the minimum value.)
About oscillation input at power on
When turning the power on, maintain clock input until the device is released from the oscillation stabilization
wait state.
Caution on Operations during PLL Clock Mode
Even if the oscillator comes off or the clock input stops with the PLL clock selected for this microcontroller, the
microcontroller may continue to operate at the free-running frequency of the PLL’s internal self-oscillating oscil-
lator circuit. Performance of this operation, however, cannot be guaranteed.
External bus setting
This model guarantees an external bus frequency of 25 MHz.
Setting the base clock frequency to 50 MHz with DIVR1 (external bus base clock division setting register)
initialized sets the external bus frequency also to 50 MHz. Before changing the base clock frequency, set the
external bus frequency not exceeding 25 MHz.
MCLK and SYSCLK
MCLK and SYSCLK has a difference that MCLK stops in SLEEP/STOP mode but SYSCLK stops only in STOP
mode. Use either depending on each application.
Upon initialization, MCLK becomes invalid (PORT) and SYSCLK becomes valid. To use MCLK, set the port
function register (PFR) to select the use of that clock.
Pull-up control
Connecting a pull-up resistor to the pin serving as an external bus pin cannot a guarantee the AC standard.
Even the port for which a pull-up resistor has been set is invalid in stop mode with HIZ = 1 or in hardware standby
mode.
X0
X1
MB91350A
OPEN
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB91F355APMT-002 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F355APMT-GE1 | 制造商:FUJITSU 功能描述:IC 16BIT MCU 5V SMD LQFP176 |
| MB91F356B | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F356BPMT | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
| MB91F357B | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
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