参数资料
| 型号： | MC100EP14DT |
| 厂商： | ON Semiconductor |
| 文件页数： | 1/9页 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFF MUX 2:5 2GHZ 20TSSOP |
| 标准包装： | 75 |
| 系列： | 100EP |
| 类型： | 扇出缓冲器（分配），多路复用器 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:5 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | ECL，HSTL，PECL |
| 输出： | ECL，PECL |
| 频率 - 最大： | 2GHz |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 管件 |
| 其它名称： | MC100EP14DTOS |
Semiconductor Components Industries, LLC, 2010
June, 2010 Rev. 6
1
Publication Order Number:
MC100EP14/D
MC100EP14
3.3V / 5V1:5 Differential
ECL/PECL/HSTL Clock Driver
Description
The MC100EP14 is a low skew 1to5 differential driver, designed with
clock distribution in mind, accepting two clock sources into an input
multiplexer. The ECL/PECL input signals can be either differential or
singleended (if the VBB output is used). HSTL inputs can be used when
the LVEP14 is operating under PECL conditions.
The EP14 specifically guarantees low outputtooutput skew. Optimal
design, layout, and processing minimize skew within a device and from
device to device.
To ensure that the tight skew specification is realized, both sides of
any differential output need to be terminated even if only one output is
being used. If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
The common enable (EN) is synchronous, outputs are enabled/
disabled in the LOW state. This avoids a runt clock pulse when the
device is enabled/disabled as can happen with an asynchronous
control. The internal flip flop is clocked on the falling edge of the input
clock, therefore all associated specification limits are referenced to the
negative edge of the clock input.
The VBB pin, an internally generated voltage supply, is available to
this device only. For singleended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
Features
400 ps Typical Propagation Delay
100 ps DevicetoDevice Skew
25 ps Within Device Skew
Maximum Frequency > 2 GHz Typical
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode:
VCC = 0 V with VEE = 3.0 V to 5.5 V
Open Input Default State
These are PbFree Devices
TSSOP20
DT SUFFIX
CASE 948E
MARKING DIAGRAM*
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
http://onsemi.com
100
EP14
ALYWG
G
1
20
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
相关PDF资料 |
PDF描述 |
|---|---|
| MC100EP16FDTR2 | IC RCVR/DRVR 5V DIFF ECL 8-TSSOP |
| MC100EP16VBDR2 | IC RCVR/DRVR 5V DIFF ECL 8-SOIC |
| MC100EP16VCDTR2 | IC RCVR/DRVR 5V DIFF ECL 8-TSSOP |
| MC100EP16VSDTR2 | IC RCVR/DRVR 5V DIFF ECL 8-TSSOP |
| MC100EP16VTD | IC RCVR/DRVR ECL DIFF VAR 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC100EP14DTG | 功能描述:时钟驱动器及分配 5V ECL/PECL/HST 1:5 Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EP14DTG | 制造商:ON Semiconductor 功能描述:CLOCK GENERATOR / DISTRIBUTOR LOGIC IC |
| MC100EP14DTR2 | 功能描述:时钟驱动器及分配 5V ECL/PECL/HST 1:5 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EP14DTR2G | 功能描述:时钟驱动器及分配 5V ECL/PECL/HST 1:5 Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100EP16 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Differential Receiver |
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