参数资料
| 型号： | MC100EP196FAR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/18页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-LQFP |
| 标准包装： | 1 |
| 系列： | 100EP |
| 标片/步级数： | 1024 |
| 功能： | 可编程 |
| 延迟到第一抽头： | 2.36ns |
| 接头增量： | 10ps |
| 可用的总延迟： | 2.36ns ~ 12.258ns |
| 独立延迟数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 剪切带 (CT) |
| 其它名称： | MC100EP196FAROSCT |
MC100EP196
http://onsemi.com
3
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Default State
Description
23, 25, 26, 27,
29, 30, 31, 32,
1, 2
D[0:9]
LVCMOS, LVTTL,
ECL Input
LOW
Singleended Parallel Data Inputs [0:9]. Internal 75 kW to VEE.
(Note 1)
3
D[10]
LVCMOS, LVTTL,
ECL Input
LOW
Singleended CASCADE/CASCADE Control Input. Internal 75 kW
4
IN
ECL Input
LOW
Noninverted Differential Input. Internal 75 kW to VEE.
5
IN
ECL Input
HIGH
Inverted Differential Input. Internal 75 kW to VEE.
6
VBB
ECL Reference Voltage Output
7
VEF
Reference Voltage for ECL Mode Connection
8
VCF
LVCMOS, ECL, OR LVTTL Input Mode Select
9, 28
VEE
Negative Supply Voltage. All VEE Pins must be Externally Connec-
ted to Power Supply to Guarantee Proper Operation. (Note 2)
13, 18, 19, 22
VCC
Positive Supply Voltage. All VCC Pins must be externally Connec-
ted to Power Supply to Guarantee Proper Operation. (Note 2)
10
LEN
ECL Input
LOW
Singleended D pins LOAD / HOLD input. Internal 75 kW to VEE.
11
SETMIN
ECL Input
LOW
Singleended Minimum Delay Set Logic Input. Internal 75 kW to
12
SETMAX
ECL Input
LOW
Singleended Maximum Delay Set Logic Input. Internal 75 kW to
14
CASCADE
ECL Output
Inverted Differential Cascade Output for D[10] Input. Typically Ter-
minated with 50 W to VTT = VCC 2 V.
15
CASCADE
ECL Output
Noninverted Differential Cascade Output for D[10] Input. Typically
Terminated with 50 W to VTT = VCC 2 V.
16
EN
ECL Input
LOW
Singleended Output Enable Pin. Internal 75 kW to VEE.
17
FTUNE
Analog Input
Fine Tuning Input.
21
Q
ECL Output
Noninverted Differential Output. Typically Terminated with 50 W to
VTT = VCC 2 V.
20
Q
ECL Output
Inverted Differential Output. Typically Terminated with 50 W to
VTT = VCC 2 V.
1. SETMIN will override SETMAX if both are high. SETMAX and SETMIN will override all D[0:10] inputs.
2. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
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| MC100EP196FAR2G | 功能描述:延迟线/计时元素 3.3V/5V ECL Programmable Delay RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| MC100EP210S | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2.5V1:5 Dual Differential LVDS Compatible Clock Driver |
| MC100EP210S_06 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2.5V 1:5 Dual Differential LVDS Compatible Clock Driver |
| MC100EP210SFA | 功能描述:时钟缓冲器 2.5V 1:5 Dual Diff RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MC100EP210SFAG | 功能描述:时钟缓冲器 2.5V 1:5 Dual Diff LVDS Clock Driver RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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