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参数资料
| 型号： | MC10141P |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 计数移位寄存器 |
| 英文描述： | 10K SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封装： | PLASTIC, DIP-16 |
| 文件页数： | 1/8页 |
| 文件大小： | 119K |
| 代理商： | MC10141P |
Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10141/D
MC10141
Four Bit Universal Shift
Register
The MC10141 is a four–bit universal shift register which performs
shift left, or shift right, serial/parallel in, and serial/parallel out
operations with no external gating. Inputs S1 and S2 control the four
possible operations of the register without external gating of the clock.
The flip–flops shift information on the positive edge of the clock. The
four operations are stop shift, shift left, shift right, and parallel entry of
data. The other six inputs are all data type inputs; four for parallel
entry data, and one for shifting in from the left (DL) and one for
shifting in from the right (DR).
P
D = 425 mW typ/pkg (No Load)
f
Shift = 200 MHz typ
t
r, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
Parallel Enter
Shift Right
Shift Left
Hold
D Q
C
1 of 4
Decode
r
D3
DL
S1
DR
C
Q3
S2
D2
D1
D0
Q2
Q1
Q0
D Q
C
D Q
C
D Q
C
TRUTH TABLE
SELECT
OUTPUTS
S1
S2
OPERATING MODE
Q0n+1
Q1n+1
Q2n+1
Q3n+1
L
Parallel Entry
D0
D1
D2
D3
L
H
Shift Right*
Q1n
Q2n
Q3n
DR
H
L
Shift Left*
DL
Q0n
Q1n
Q2n
H
Stop Shift
Q0n
Q1n
Q2n
Q3n
*Outputs as exist after pulse appears at “C” input with input conditions as
shown. (Pulse = Positive transition of clock input).
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10141L
CDIP–16
25 Units / Rail
MC10141P
PDIP–16
25 Units / Rail
MC10141FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10141L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10141
AWLYYWW
1
16
MC10141P
AWLYYWW
DIP PIN ASSIGNMENT
VCC1
Q2
Q3
C
DR
D3
S2
VEE
VCC2
Q1
Q0
DL
D0
D1
S1
D2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
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