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| 型号： | MC33689DWB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 16/31页 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM BASE W/LIN 32-SOIC |
| 标准包装： | 42 |
| 应用： | 自动镜像控制 |
| 接口： | SPI |
| 电源电压： | 5.5 V ~ 18 V |
| 封装/外壳： | 32-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 32-SOIC |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
| 配用： | KIT33689DWBEVB-ND - KIT FOR 33689 SBC WITH LIN |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
23
33689
FUNCTIONAL DESCRIPTION
FUNCTIONAL DEVICE OPERATION
NORMAL MODE
In Normal Mode, the 33689 has slew rate and timing
compatible with the LIN protocol specification. The LIN bus
can transmit and receive information. The VDD regulator is
ON and the watchdog function can be enabled.
SLEEP AND STOP MODE
To safely enter Sleep or Stop modes and to ensure that
these modes are not inadvertently entered due to noise
issues during SPI transmission, a dedicated sequence must
be sent twice: data with the bits controlling the LIN bus and
the device mode.
Entering Sleep Mode
First and second SPI commands (with bit D6=1, D7=1,
D5 =0 or 1, D1=0, and D0=0) 11x00000 must be sent.
Entering Stop Mode
First and second SPI commands (with bit D6=1, D7=1,
D5 =0 or 1, D1=0, and D0=1) 11x00001 must be sent.
Sleep or Stop modes are entered after the second SPI
command. Register bit D5 must be set accordingly.
Table 1. Operational Modes and Associated Functions
Device Mode
VDD Voltage
Regulator
Wake-Up
Capabilities
RST
Output
Watchdog
Function
HS1, HS2, HS3
LIN Interface
Operational
Amplifier
Reset
VDD: ON
N/A
LOW for 1.0 ms
typical, then
HIGH (if VDD
above threshold)
Disabled
OFF
Recessive only
Not active
Normal
Request
VDD: ON
N/A
HIGH.
Active LOW if
VDD
undervoltage
occurs and if
Normal Request
timeout (if
Watchdog
enabled)
150 ms timeout
if Watchdog
enabled
ON or OFF
Transmit and
receive
Not active
Normal
VDD: ON
N/A
HIGH.
Active LOW if
VDD
undervoltage
occurs or if
Watchdog fail (if
Watchdog
enabled)
Window
Watchdog if
enabled
ON or OFF
Transmit and
receive
Active
Stop
VDD: ON
(Limited current
capability)
LIN and state
change on
L1:L2 inputs
Normally HIGH.
Active LOW if
VDD
undervoltage
occurs
Disabled
OFF
Recessive state
with Wake
capability
Not active
Sleep
VDD: OFF
(Set to 5.0 V
after Wake-Up
to enter Normal
Request)
LIN and state
change on
L1:L2 inputs
LOW.
Go to HIGH after
Wake-Up and
VDD within
specification
Disabled
OFF
Recessive state
with Wake
capability
Not active
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| MC33690DWER2 | 功能描述:数字信号处理器和控制器 - DSP, DSC STAND ALONE TAG READER RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
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| MC33696FCAER2 | 功能描述:射频收发器 UHF TRANSCEIVER ECHO RoHS:否 制造商:Atmel 频率范围:2322 MHz to 2527 MHz 最大数据速率:2000 Kbps 调制格式:OQPSK 输出功率:4 dBm 类型: 工作电源电压:1.8 V to 3.6 V 最大工作温度:+ 85 C 接口类型:SPI 封装 / 箱体:QFN-32 封装:Tray |
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