参数资料
型号: MC33742EPR2
厂商: Freescale Semiconductor
文件页数: 31/71页
文件大小: 0K
描述: IC SYSTEM BASE W/CAN 48-QFN
标准包装: 2,000
应用: 自动
接口: SPI
电源电压: 5.5 V ~ 18 V
封装/外壳: 48-VFQFN 裸露焊盘
供应商设备封装: 48-QFN-EP(7x7)
包装: 带卷 (TR)
安装类型: 表面贴装
Analog Integrated Circuit Device Data
Freescale Semiconductor
37
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
CAN PHYSICAL INTERFACE
The SBC features a high-speed CAN physical interface for bus communication from 60kbps up to 1.0Mbps. Figure 19 is a
simplified block diagram of the CAN interface of the 33742.
Figure 19. Simplified Block Diagram of CAN Interface
CAN INTERFACE SUPPLY
The supply voltage for the CAN transceiver is the V2 pin. The CAN interface also has a supply path from the external supply
line through the VSUP pin. This path is used in CAN Sleep mode to allow wake-up detection.
During CAN communication (transmission and reception), the CAN interface current is sourced from the V2 pin. During CAN
low power mode, the current is sourced from the VSUP pin.
MAIN OPERATION MODES DESCRIPTION
The CAN interface of the SBC has two main operating modes: TXRX and Sleep mode. The modes are controlled by the CAN
SPI Register. In the TXRX mode, which is used for communication, four different slew rates are available for the user. In the
Sleep mode, the user has the option of enabling or disabling the remote CAN wake-up capability.
CAN DRIVER OPERATION IN TXRX MODE
When the CAN interface is in TXRX mode, the driver has two states: recessive or dominant. The driver state is controlled by
the TXD pin. The bus state is reported through the RXD pin.
When TXD is HIGH, the driver is set in recessive state, and CANH and CANL lines are biased to the voltage set at V2 divided
by 2, or approximately 2.5 V.
When TXD is LOW, the bus is set into dominant state: CANL and CANH drivers are active. CANL is pulled to ground, and
CANH is pulled HIGH toward 5.0 V (voltage at V2).
The RXD pin reports the bus state: CANH minus CANL voltage is compared versus an internal threshold (a few hundred
millivolts). If CANH minus CANL is below the threshold, the bus is recessive and RXD is set HIGH. If CANH minus CANL is above
the threshold, the bus is dominant and RXD is set LOW. This is illustrated in Figure 19.
V2
Bus Termination (60
)
CANH Line
CANL Line
TXD
RXD
Differential
Receiver
Driver
2.5 V
Wake-up
Receiver
Pattern
Recognition
Internal
VSUP
Wake-up
Signal
CANH
CANL
SPI Control
V2
QH
QL
33742
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