参数资料
型号: MC33889BDW
厂商: Freescale Semiconductor
文件页数: 29/59页
文件大小: 0K
描述: IC SYSTEM BASE W/CAN 28-SOIC
标准包装: 1
控制器类型: 系统基础芯片
接口: CAN
电源电压: 5.5 V ~ 18 V
电流 - 电源: 45mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 管件
Analog Integrated Circuit Device Data
Freescale Semiconductor
35
33889
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
MC33889B:
When detection is complete, the counter is no longer incremented. It can only be decremented by sampling of the dominant
level on the S-H (S-L) (recovery pulse). When it reaches zero, the failure has recovered.
In application, with CAN communication, a recovery condition is detected after 4 acknowledge bits are sent by the MC33889B.
MC333889D:
When detection is complete, the counter is decremented by sampling the dominant pulse (recovery pulse) on S-H (S-L), and
incremented (up to 4) by sampling the recessive pulse (detection pulses) on S-H (S-L). It is necessary to get 4 consecutive
dominant samples (recovery pulse) to get to zero. When reaching zero, the failure is recovered.
In application with real CAN communication, a recovery condition will not be detected by a single acknowledge bit send by
MC33889D, but requires a complete CAN message (at least 4 dominant bits) send in dual wire mode, without reception of any
bit in single wire mode.
Tx permanent dominant detection:
In addition to the previous list, the 33889 detects a permanent low state at the TX input which results in a permanent dominant
bus state. If TX is low for more than 0.75-4.0 ms, the bus output driver is disabled. This avoids blocking communication between
other nodes of the network. TXD is reported via the SPI (RCR register bit D1: TXFAILURE). Tx permanent dominant recovery is
done with TX recessive for more than typ 32
s.
Rx pin behavior while CAN interface is in TermVBAT.
The MC33889D is able to signal bus activity on Rx while the CAN interface is in TermVBAT and the SBC in normal or standby
mode. When the bus is driven into a dominant state by another sending node, each dominant state is reported at Rx by a low
level, after a delay of tWAKE.
The bus state report is done through the CAN interface wake-up comparator on CANL and CANH, and thus operates also in
case of bus failure. This is illustrated in Figure 16.
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