参数资料
型号: MC33911G5AC
厂商: Freescale Semiconductor
文件页数: 78/92页
文件大小: 0K
描述: IC SYSTEM BASIS CHIP 32LQFP
标准包装: 250
应用: 系统基础芯片
电流 - 电源: 4.5mA
电源电压: 5.5 V ~ 27 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 托盘
MC33911BAC / MC34911BAC
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
If the LINM bit is set in the Interrupt Mask Register (IMR) an
Interrupt IRQ will be generated.
Over-temperature Shutdown (LIN Interrupt)
The output low side FET is protected against over-
temperature conditions. If an over-temperature condition
occurs, the transmitter will be shut down and the LINOT bit in
the LINSR is set.
If the LINM bit is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once the
condition is gone and TXD is high.
A read of the LINSR with the TXD pin high will re-enable the
transmitter.
RXD Short-circuit Detection (LIN Interrupt)
The LIN transceiver has a short-circuit detection for the RXD
output pin. In case of a short-circuit condition, either 5.0 V or
Ground, the RXSHORT bit in the LINSR is set and the
transmitter is shutdown.
If the LINM bit is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once the
condition is gone (transition on RXD) and TXD is high.
A read of the LINSR without the RXD pin short-circuit
condition will clear the RXSHORT bit.
TXD Dominant Detection (LIN Interrupt)
The LIN transceiver monitors the TXD input pin to detect
stuck-in-dominant (0 V) condition. If a stuck condition occurs
(TXD pin 0V for more than 1 second (typ.), the transmitter is
shut down and the TXDOM bit in the LINSR is set.
If the bit LINM is set in the IMR an Interrupt IRQ will be
generated.
The transmitter is automatically re-enabled once TXD is high.
A read of the LINSR with the TXD pin is high will clear the bit
TXDOM.
LIN Dominant Voltage Level Selection
The LIN dominant voltage level can be selected by the LDVS
bit in the LIN Control Register (LINCR).
LIN Receiver Operation Only
While in Normal mode, the activation of the RXONLY bit
disables the LIN TXD driver. If a LIN error condition occurs,
this bit is automatically set. If a low-power mode is selected
with this bit set, the LIN wake-up functionality is disabled.
Then in STOP mode, the RXD pin will reflect the state of the
LIN bus.
STOP Mode And Wake-up Feature
During Stop mode operation, the transmitter of the physical
layer is disabled. If the LIN-PU bit was set in the Stop mode
sequence, the internal pull-up resistor is disconnected from
VSUP and a small current source keeps the LIN pin in the
recessive state. The receiver is still active and able to detect
wake-up events on the LIN bus line.
A dominant level longer than t PROPWL followed by a rising
edge will generate a wake-up interrupt and will be reported in
the Interrupt Source Register (ISR). Also see Figure 34 .
SLEEP Mode And Wake-up Feature
During Sleep mode operation, the transmitter of the physical
layer is disabled. If the LIN-PU bit was set in the Sleep mode
sequence, the internal pull-up resistor is disconnected from
V SUP and a small current source keeps the LIN pin in
recessive state. The receiver must still active to detect wake-
up events on the LIN bus line.
A dominant level longer than t PROPWL followed by a rising
edge will generate a system wake-up (Reset), and will be
reported in the ISR. Also see Figure 33 .
33911
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
78
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