参数资料
型号: MC34827A1EPR2
厂商: Freescale Semiconductor
文件页数: 25/57页
文件大小: 0K
描述: IC USB POWER MANAGER 20-QFN
标准包装: 1
应用: OR 控制器,UART/USB 数据,音频管理
电流 - 电源: 9µA
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-UFQFN 裸露焊盘
供应商设备封装: 20-QFN 裸露焊盘(3x3)
包装: 标准包装
其它名称: MC34827A1EPR2DKR
FUNCTIONAL DEVICE OPERATION
OPERATION AFTER IDENTIFICATION
The period of ADC conversion is determined by the Device
Wake-up bits in the Timing Set 1 register. All other behaviors
of Audio Type 1 and other accessories will not be affected by
the RAW DATA bit.
POWER SAVE MODE (AUTOPSAVE BIT)
The 34827 supports the Power Save mode when the
accessory is Audio Type 1 or TTY to reduce the power
consumption. The default behavior of 34827 is to enter the
Power Save mode automatically if no signal activity is
detected within a programmable time which is controlled by
the Activity Idle Detection Time bits in the Time Delay
register. The default delay time is 10s. Once the signal
activity is detected, the 34827 will quit the Power Save mode
and enter the Active mode immediately. In the Power Save
mode, the SPK_R/SPK_L to DP/DM switches and the VBUS
to MIC switch all keep on. Remote control key pressing in
Power Save mode can be responded as in the Active mode.
If the AutoPSAVE bit in FSL Control register is set to ‘0’,
the 34827 will not enter Power Save mode automatically.
Under this condition, the baseband can control the mode
transition manually by writing the PSAVE bit when the
accessory is Audio Type 1 or TTY. If the PSAVE is set to ‘0’,
the 34827 keeps in Active mode; if the PSAVE is set to ‘1’,
the 34827 keeps in Power Save mode even if the audio signal
is applied at SPK_R and SPK_L pins.
If the Manual S/W is set to ‘0’ for Audio Type 1 or TTY, the
34827 has the same mode transition behavior as when the
Manual S/W is in default value ‘1’.
NORMAL OPERATION SETTING OF THE
CONTROL BITS
After the VDD and VDDIO are powered up, the 34827 is
normally configured to turn on the switches automatically
after the attached accessory is identified. Thus the
INT_MASK bit must be set to ‘0’, the WAIT bit is normally set
to ‘1’, the Manual S/W bit is set to ‘1’, the RAW Data bit is set
to ‘1’ and the Switch_Open bit is set to ‘1’. This is the normal
setting of these control bits for the normal operation.
ANALOG AND DIGITAL SWITCHES
The signal switches in the 34827 are shown in Figure 20 .
These switches are controlled by the identification result
when the Manual S/W = 1 and by the Manual S/W registers
when the Manual S/W = 0 in Active mode. The Switch_Open
bit overrides the switch configuration. When the
Switch_Open bit is 0, all switches, including the power
MOSFET, are turned off.
The switches for the SPK_L and SPK_R are capable of
passing signals of ± 1.5 V, referencing to GND pin voltage.
The SPK_L and SPK_R pins are pulled down to ground via a
100 k Ω resistor respectively, as shown in Figure 20 .
When the switches are configured automatically by the
identification result, the configuration of the switches vs. the
device type is shown in Table 7 .
When detachment of an accessory is detected, the 34827
will return to the Standby mode. In the Standby mode, no
matter Manual S/W = 1 or Manual S/W = 0, all signal switches
and the power MOSFET are off in the Standby mode except
for the OUT-to-ground FET SW10. The OUT-to-ground FET
is turned on whenever the FET_ON bit is ‘0’. The ISET and
JIG pins output high-impedance and BOOT pin outputs low
logic voltage in the Standby mode
MC34827
Analog Integrated Circuit Device Data
Freescale Semiconductor
25
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