参数资料
型号: MC34827A1EPR2
厂商: Freescale Semiconductor
文件页数: 47/57页
文件大小: 0K
描述: IC USB POWER MANAGER 20-QFN
标准包装: 1
应用: OR 控制器,UART/USB 数据,音频管理
电流 - 电源: 9µA
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-UFQFN 裸露焊盘
供应商设备封装: 20-QFN 裸露焊盘(3x3)
包装: 标准包装
其它名称: MC34827A1EPR2DKR
TYPICAL APPLICATIONS
APPLICATION INFORMATION
VDD
VDDIO
INT_MASK
VDD
VDDIO
INT_MASK
INT_MASK is cleared manually
by I2C after I2C is valid
Attaching
INTB
VBUS detection delay time
defined in register 0x22 and
Identification flow delay
Attaching
INTB
Delay defined by the Switching
Wait in register 0x09 when the
WAIT=1
VBUS detection delay time
defined in register 0x22 and
Identification flow delay
ISET
JIG_ON
HI-Z
HI-Z
~4.5ms
ISET
JIG_ON
HI-Z
HI-Z
~4.5ms
Power
Switch
OPEN
CLOSED
Power
Switch
OPEN
CLOSED
1.2ms
I2C
VALID
VALID
VALID
I2C
NOT VALID
VALID
(a) Charger identification Timing in phone power-on state
(b) Charger identification Timing in phone power-off state
Figure 39. Charger Identification Timing Diagram
VDD
VDDIO
VDD
VDDIO
INT_MASK is cleared manually
INT_MASK
INT_MASK
by I2C after I2C is valid
Attaching
INTB
VBUS detection delay time
defined in register 0x22 and
Identification flow delay
Attaching
INTB
Delay defined by the
Switching Wait in register
0x09 when the WAIT=1
VBUS detection delay time
defined in register 0x22 and
Identification flow delay
JIG_ON
HI-Z
~4.5ms
JIG_ON
HI-Z
~4.5ms
Power
Switch
OPEN
CLOSED
Delay defined by the Switaching Wait
in register 0x09 when the WAIT=1
Power
Switch
OPEN
CLOSED
~1ms
Signal
Switches
OPEN
CLOSED
Signal
Switches
OPEN
CLOSED
1.2ms
I2C
VALID
VALID
VALID
I2C
NOT VALID
VALID
(a) JIG_USB identification Timing in phone power-on state
(b) Charger identification Timing in phone power-off state
Figure 40. JIG USB cable Identification Timing Diagram
MC34827
Analog Integrated Circuit Device Data
Freescale Semiconductor
47
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