参数资料
型号: MC44461
厂商: Motorola, Inc.
英文描述: PICTURE-IN-PICTURE (PIP) CONTROLLER
中文描述: 子母画中画(PIP)控制器
文件页数: 11/16页
文件大小: 314K
代理商: MC44461
MC44461
11
MOTOROLA ANALOG IC DEVICE DATA
Main vertical polarity select bit (MVP0) – D6
Selects polarity of active level of vertical reference input.
0 = positive going, 1 = negative going.
Main horizontal polarity select bit (MHP0) – D7
Selects polarity of active level of horizontal reference
input. 0 = positive going, 1 = negative going.
PIP Freeze/PIP Size/Main and PIP Video Source Register
Sub–address = 04h
PIP Freeze Bit (STIL0) – D4
When set to one, the most recently received field is
continuously displayed until the freeze bit is cleared.
PIP Size Bit (PSI90) – D5
Switches the PIP size between 1/16 main size (when 0)
and 1/9 main size (when 1).
Main Video Source Select Bit (MSEL0) – D6
Selects which video input will be applied to the PIP switch
as the main video out.
PIP Video Source Select Bit (PSEL0) – D7
Selects which video input will be applied to the video
decoder to provide the PIP video.
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PIP On/PIP Blank Register
Sub–address = 05h
PIP On Bit (PON0) – D0
When on (1) turns the PIP on.
PIP Blanking Bit (PBL0) – D4
When on (1) sets the PIP to black. If the PIP is off, then it
will be black if it is turned on. Overrides all other settings of
the PIP control.
PIP X Position Register
Sub–address = 06h
X Position Bits (XPS0–5) – D0–D5
Moves the PIP start position from the left to the right
edge of the display in 64 steps. There is protection circuitry
to prevent the PIP from interfering with the main picture
sync pulses.
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Video 1 Input to PIP
1
Video 2 Input to Main/
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PIP Y Position Register
Sub–address = 07h
Y Position Bits (YPS0–5) – D0–D5
Moves the PIP start position from the top to the bottom
edge of the display in 64 steps. There is protection circuitry to
prevent the PIP from interfering with the main picture sync
pulses.
PIP Chroma Level Register
Sub–address = 08h
Chroma (C0–5) – D0–D5
The color of the PIP can be adjusted to suit viewer
preference by setting the value stored in these bits. A total of
64 steps varies the color from no color to maximum. This
control acts in conjunction with the auto phase control.
PIP Tint Level Register
Sub–address = 09h
Tint (T0–5) – D0–D5
An auto phase control compares the main color burst to
the internally generated pseudo color burst so that the tints
are matched. In addition to this, the tint of the PIP can be
varied
±
10
°
in a total of 64 steps by changing the value of
these bits to suit viewer preference.
PIP Luma Delay Register
Sub–address = 0Ah
Y Delay (YDL0–2) – D0–D2
Since the Chroma passes through a bandpass filter and
the color decoder, it is delayed with respect to the Luma
signal. Therefore, to time match the Luma and Chroma these
bits are set to a single value determined to be correct in the
application.
Pip Fill/Test Register
Sub–address = 0Ch
PIP Fill Bits (PIPFILL0–1) – D0–D1
May be used to fill the PIP with one of three selectable
solid colors
Test Register Bits (INTC0 and MACR0) – D6–D7
Used for production test only.
Function Control of the MC44461
The registers of the MC44461 may be programmed via the
I2C bus. At power up, the registers are in an undefined state.
The Setup Value given in the Register Table represents a
nominal start point. The setup will put a 1/9 size PIP, with
white borders, in the lower right corner of the screen.
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