参数资料
型号: MC44604PG
厂商: ON Semiconductor
文件页数: 17/22页
文件大小: 0K
描述: IC REG CTRLR FLYBACK PWM 16-DIP
产品变化通告: Product Obsolescence 19/Dec/2008
标准包装: 500
系列: GreenLine™
PWM 型: 电流模式
输出数: 1
频率 - 最大: 250kHz
占空比: 82%
电源电压: 10 V ~ 15 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -25°C ~ 85°C
封装/外壳: 16-DIP(0.300",7.62mm)
包装: 管件
其它名称: MC44604PGOS
MC44604
Pin 11
RI
R Connected to
Pin 11 V Z
I = 0.4 I ref
C
V Z
RI
C // R
V CS grows up till it reaches its maximum value (normally,
V CS max = 1 V).
Then if the output load keeps on increasing, the system is
τ = RC
Figure 35. Different Possible Uses of Pin 11
In any case (particularly if no external component is
connected to pin 11), an internal zener diode (D Z , refer to
Figure 34) is able to clamp the pin 11 voltage to a value V Z
that is higher than the oscillator value and so, that results in
no max duty cycle limitation.
As soon as V disable1 is detected, a signal UVLO1 is
generated until the V CC voltage falls down to V disable2
(refer to the undervoltage lockout section paragraph).
During the delay between the disable 1 and the disable 2,
using a transistor controlled by UVLO1, the pin 11 voltage
not able to supply enough energy to maintain the output
regulation. Consequently, the decreasing output can be used
to apply a voltage that diminishes to a value lower than 1 V,
to pin 5, in order to limit the maximum peak current. In this
way, the well known foldback characteristic is obtained
(refer to Figure 36).
The foldback action can be inhibited by connecting the pin
5 to V CC .
Overvoltage Protection
The overvoltage arrangement consists of a comparator
that compares the pin 6 voltage to V ref (2,5 V) (refer to
Figure 37).
V ref
C OVLO
(If V OVP out = 1.0,
(V ref )
is made equal to zero in order to make the max duty cycle and
soft ? start arrangement ready to work for the next restart.
In standby mode, this block is inhibited in order not to
interfere with the Standby Current Set.
Protection
The MC44604 can ensure a high converter reliability
thanks to the protection it offers.
Demagnetization Detection (Refer to Demag §)
Foldback
As depicted in Figure 28, the foldback input (pin 5)
V OVP
Pin 6
V CC
T
0 2.5 V
11.6 K
2K
In
Delay τ 5.0 m s
Out
Enable
V OVP out
In τ Out
Delay
2.0 m s
2.5 V
the Output is Disabled)
enables to reduce the maximum V CS value that would be
equal to 1 typically, if there was no foldback action. Finally,
the foldback arrangement is a programmable peak current
limitation.
Figure 37. Overvoltage Protection
If no external component is connected to pin 6, the
comparator non inverting input voltage is nearly equal to:
V out
I pk max
2 k Ω
11, 6 k Ω ) 2 k Ω
? VCC
V O
Nominal
So, the comparator output is high when:
CC
New Startup
Sequence Initiated
2 k Ω
11, 6 k Ω ) 2 k Ω
?
V
w 2, 5 V
CC
V CC
V disable2
I out
Overload
V w 17 V
A delay latch (2 m s) is incorporated in order to only take
into account the overvoltages that last at least 2 m s.
If this condition is achieved, V OVPout the delay latch
output becomes high and as this level is brought back to the
Figure 36. Foldback Characteristic
It could be used as a soft ? start (by connecting to pin 5, a
gradually increasing voltage) but in fact, it has been
designed to provide the system with an effective overload
protection.
Indeed, as the output load gradually increases, the
required converter peak current becomes higher and so,
input through an OR gate, V OVPout remains high (and so,
the IC output is disabled) until V ref is disabled.
Consequently when an overvoltage longer than 2 m s is
detected, the output is disabled until a new circuit restart.
The V CC is connected when once the circuit has
started ? up in order to limit the circuit startup consumption
(T is switched on when once V ref has been generated).
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17
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