参数资料
| 型号： | MC44604PG |
| 厂商： | ON Semiconductor |
| 文件页数： | 18/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBACK PWM 16-DIP |
| 产品变化通告： | Product Obsolescence 19/Dec/2008 |
| 标准包装： | 500 |
| 系列： | GreenLine™ |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 250kHz |
| 占空比： | 82% |
| 电源电压： | 10 V ~ 15 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 包装： | 管件 |
| 其它名称： | MC44604PGOS |
MC44604
The overvoltage section is enabled 5 m s after the regulator
has started to allow the reference V ref to stabilize.
By connecting external resistors to pin 6, the threshold
V CC level can be changed.
R ref
Thus, finally in normal mode, the upper V cc limit that
enables the output to be active, is 9.4 V (maximum value of
V disable1 ) and so the minimum hysteresis is 4.2 V.
[(V stup ? th ) min = 13.6 V].
The large hysteresis and the low startup current of the
MC44604 make it ideally suited for off ? line converter
applications where efficient bootstrap startup techniques are
V CC
(Pin 1)
1 0
V disable
7.5 V or
V ref enable
C STARTUP
1 0
STARTUP
14.5 V
Pin 16
Reference Block:
Voltage and Current
Sources Generator
(V ref , I ref , ...)
required.
Standby Management
The MC44604 has been designed to detect the transitions
between the standby and normal mode and to manage each
mode in an optimal way.
In standby, the device monitors a pulsed mode that enables
to drastically reduce the power consumption.
12.5 V
UVLO1
C UVLO1 (to SOFT ? START)
V disable1
9.0 V
MC44604
Pulsed Mode
The MC44604 standby is preferably associated to a
flyback configuration as depicted in Figure 39.
Figure 38. V CC Management
Input
Voltage
Undervoltage Lockout Section
V CC
L p
1 0
1 = Standby
0 = Normal
Mode
As depicted in Figure 39, an undervoltage lockout has
been incorporated to guarantee that the IC is fully functional
m P
before allowing operation of the system.
Indeed, the V CC is connected to the non inverting input of
a comparator that has an upper threshold equal to 14,5 V
MC44604
V stby
Regulator
(V stup ? th ) and a lower one equal to 7.5 V (V disable2 ) in
normal mode and 14.5 V and 12.5 V in Standby mode
(typical values) (Note 1).
ref where V
ref
ref
R
HV
stby
This hysteresis comparator enables or disables the
reference block that generates the voltage and current
sources required by the system.
This block particularly, produces V ref (pin 16 voltage)
and I ref that is determined by the resistor R ref connected
between pin 16 and the ground:
V
I + + 2.5 V (typically)
ref
In addition to this, V CC is compared to a second threshold
level that is nearly equal to 9 V (V disable1 ) so that in normal
mode, a signal UVLO1 is generated to reset the maximum
duty cycle and soft ? start block and so, to disable the output
stage (refer to Max. Duty Cycle and Soft ? Start §) as soon as
V CC becomes lower than V disable1 . In this way, the circuit is
reset and made ready for a next startup, before the reference
block is disabled (refer to Figure 26). In standby, UVLO1 is
not active (there is no need to discharge the soft ? start
capacitor as the soft ? start pin is maintained short circuited).
Note 1. In standby the difference between V disable2 and
V stup ? th is decreased not to have too low pulsed mode
frequencies.
Figure 39. Standby Flyback Configuration
In effect, by this means, all the output regulation levels are
divided by the ratio:
V
V
where V HV is the normal mode high voltage regulation
level, V stby is the standby m P supply voltage.
For instance, in the case of TV or monitors applications,
the output levels (except the m P supply voltage, V stby ) are
drastically reduced by a ratio in the range of 10.
Consequently, as the output voltages are reduced, the
losses due to the output leakage consumption, are practically
eliminated, without having to disconnect the loads.
Startup Operations
The choice of the right configuration (normal or standby)
is performed at each startup.
http://onsemi.com
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