- 您现在的位置：买卖IC网 > PDF目录80362 > MC68HC05C9EFB (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 PDF资料下载
参数资料
| 型号： | MC68HC05C9EFB |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | QFP-44 |
| 文件页数： | 80/144页 |
| 文件大小： | 1628K |
| 代理商： | MC68HC05C9EFB |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页当前第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
Interrupts
Advance Information
MC68HC05C9E
40
Interrupts
MOTOROLA
Unlike RESET, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current
instruction is complete.
NOTE:
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all
pending hardware interrupts. If interrupts are not masked (CCR I bit
clear) and if the corresponding interrupt enable bit is set, the processor
proceeds with interrupt processing; otherwise, the next instruction is
fetched and executed.
If an external interrupt and a timer, SCI, or SPI interrupt are pending at
the end of an instruction execution, the external interrupt is serviced first.
The SWI is executed the same as any other instruction, regardless of the
I-bit state.
Table 4-1 shows the relative priority of all the possible interrupt sources.
Figure 4-1 shows the interrupt processing flow.
4.3 Non-Maskable Software Interrupt (SWI)
The SWI is an executable instruction and a non-maskable interrupt. It is
executed regardless of the state of the I bit in the CCR. If the I bit is 0
(interrupts enabled), SWI executes after interrupts which were pending
when the SWI was fetched, but before interrupts generated after the SWI
was fetched. The interrupt service routine address is specified by the
contents of memory locations $3FFC and $3FFD.
4.4 External Interrupt (IRQ or Port B)
If the interrupt mask bit (I bit) of the CCR is set, all maskable interrupts
(internal and external) are disabled. Clearing the I bit enables interrupts.
The interrupt request is latched immediately following the falling edge of
IRQ. It is then synchronized internally and serviced as specified by the
contents of $3FFA and $3FFB.
相关PDF资料 |
PDF描述 |
|---|---|
| M38227MCA-XXXFP | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80 |
| MB89P475PFV-201 | 8-BIT, 12.5 MHz, MICROCONTROLLER, PQFP48 |
| MC68HC908QY1VP | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP16 |
| MC68HRC908JL3CFA | 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48 |
| MC68360CRC25L | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, CPGA241 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05CT4FB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05CT4FN | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05D9 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:8-bit microcomputer with PWM outputs and LED drive |
| MC68HC05E0 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| MC68HC05E0FN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
发布紧急采购，3分钟左右您将得到回复。