- 您现在的位置：买卖IC网 > PDF目录80570 > MC68HC05E1DWR2 (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 PDF资料下载
参数资料
| 型号： | MC68HC05E1DWR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封装： | SOIC-28 |
| 文件页数： | 36/86页 |
| 文件大小： | 491K |
| 代理商： | MC68HC05E1DWR2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页当前第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页
CPU Core
Interrupts
MC68HC05E1 — Revision 2.0
General Release Specication
MOTOROLA
CPU Core
41
comes out of a COP reset in the same operating mode it was in when
the COP time-out was generated.
The COP reset function is enabled or disabled by a mask option.
for more information on the COP Watchdog timer.
3.6.4 Illegal Address Reset
When an opcode fetch occurs from an address which is not implemented
in the RAM ($0090–$01FF) or ROM ($0F00–$1FFF), the part is
automatically reset.
3.7 Interrupts
The MCU can be interrupted four different ways: the three maskable
hardware interrupts (IRQ, timer, and CPI) and the nonmaskable
software interrupt instruction (SWI).
Interrupts cause the processor to save register contents on the stack
and to set the interrupt mask (I bit) to prevent additional interrupts. The
RTI instruction causes the register contents to be recovered from the
stack and normal processing to resume.
Unlike RESET, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current
instruction is complete.
NOTE:
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all
pending hardware interrupts. If interrupts are not masked (CCR I bit
clear) and the corresponding interrupt enable bit is set, the processor
proceeds with interrupt processing; otherwise, the next instruction is
fetched and executed.
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC05P6P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28 |
| MSU2958C25-009J | 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQCC44 |
| MSU2958C16-010U | 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP44 |
| MSU2958C40-013U | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44 |
| MSU2958C40-027J | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05E5 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E5DW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E5P | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E6 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05E6CDW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
发布紧急采购，3分钟左右您将得到回复。