参数资料
型号: MC68HC05RC18DW
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封装: SOIC-28
文件页数: 69/124页
文件大小: 457K
代理商: MC68HC05RC18DW
MC68HC05RC18
Rev.
2.0
General
Release
Specification
MOTOROLA
Resets
49
Resets
External
Reset
(RESET)
NON-DISCLOSURE
AGREEMENT
REQUIRED
PCH
PCL
OSC12
RESET
INTERNAL
PROCESSOR
INTERNAL
ADDRESS
BUS1
3FFE
3FFF
V
DD
4064 t
CYC
t
CYC
t
RL
INTERNAL
DATA
BUS1
3FFE
NEW PC
3FFF
NOTES:
1. Internal timing signal and bus information is not available externally.
2. OSC1 line is not meant to represent frequency. It is only used to represent time.
3. The next rising edge of the internal processor clock following the rising edge of RESET initiates the reset sequence.
4. VDD must fall to a level lower than VPOR to be recognized as a power-on reset on the next rise of VDD.
3
NEW
OP
CODE
PCL
PCH
NEW PC
OP
CODE
NEW PC
CLOCK1
0 V
> VPOR 4
Figure 5-2. Reset and POR Timing Diagram
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