参数资料
型号: MC68HC05SU3AFB
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP44
封装: QFP-44
文件页数: 13/80页
文件大小: 328K
代理商: MC68HC05SU3AFB
MOTOROLA
2-2
MC68HC05SU3A
PIN DESCRIPTIONS
2
2.2
OSC1 and OSC2 Connections
The OSC1 and OSC2 pins are the connections for the on-chip oscillator — the following
congurations are available:
1) A crystal or ceramic resonator as shown in Figure 2-1(a).
2) An external clock signal as shown in Figure 2-1(b).
3) RC options as shown in Figure 2-1(c) and Figure 2-1(d).
The external oscillator clock frequency, fOSC, is divided by two to produce the internal operating
frequency, fOP.
PA0-PA7
33-40
34-41
42-44, 1-5
These eight I/O lines comprise port A. The state of any pin
is software programmable. All port A lines are congured as
input during power-on or external reset.
PA0-PA7 are also associated with the Keyboard Interrupt
function. Each pin is equipped with a programmable
integrated 20K
pull-up resistor connected to VDD when
congured as input. When programmed as output, each pin
can provide a current drive of 10mA. See Section 3 for
details on the I/O ports.
PB0-PB7
25-32
26-33
31, 35-41
These eight I/O lines comprise port B. The state of any pin
is software programmable. All port B lines are congured as
input during power-on or external reset.
PB0 and PB1 are equipped with an integrated 1.9K
pull-up
resistor. PB2-PB7 are equipped with a programmable
integrated 20K
pull-up resistor connected to VDD when
congured as input. When programmed as output, each pin
can provide a current drive of 10mA. PB5-PB7 can also be
programmed to provide a lower current drive of 2mA. See
Section 3 for details on the I/O ports.
PC0-PC7
9-16
10-17
15-22
These eight I/O lines comprise port C. The state of any pin
is software programmable. All port C lines are congured as
input during power-on or external reset.
Each pin is equipped with a programmable integrated 20K
pull-up resistor connected to VDD when congured as input.
When programmed as output, each pin can provide a
current drive of 10mA. See Section 3 for details on the I/O
ports.
PD0-PD7
IRQ2
24-21, 20-17
18
25-22, 21-18
19
30-23
24
These eight I/O lines comprise port D. The state of any pin
is software programmable. All port D lines are congured as
input during power-on or external reset.
Each pin is equipped with a programmable integrated 20K
pull-up resistor connected to VDD when congured as input.
When programmed as output, each pin can provide a
current drive of 10mA.
PD6 is congured as IRQ2 by setting IRQ2E in the
Miscellaneous Control Register ($0C).
See Section 3 for details on the I/O ports.
PIN NAME
40-pin PDIP
PIN No.
42-pin SDIP
PIN No.
44-pin QFP
PIN No.
DESCRIPTION
TPG
18
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