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| 型号： | MC68HC16S2CPU25 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 94/104页 |
| 文件大小： | 812K |
| 代理商： | MC68HC16S2CPU25 |
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MC68HC16S2
MOTOROLA
MC68HC16S2TS/D
9
2.5 Signal Functions
QUOT
SIM
Output
—
R/W
SIM
Output
1/0
RESET
SIM
Input/Output
0
PE3
SIM
Output
—
SIZ[1:0]
SIM
Output
—
TSC
SIM
Input
—
XFC
SIM
Input
—
XTAL
SIM
Output
—
Table 6 MCU Signal Functions
Signal Name
Mnemonic
Function
Address Bus
ADDR[23:0]
20-bit address bus used by CPU16; ADDR[23:20] follow ADDR19
Address Strobe
AS
Indicates that a valid address is on the address bus
Autovector
AVEC
Requests an automatic vector during interrupt acknowledge
Bus Error
BERR
Signals a bus error to the CPU
Bus Grant
BG
Indicates that the MCU has relinquished the bus
Bus Grant Acknowledge
BGACK
Indicates that an external device has assumed bus mastership
Breakpoint
BKPT
Signals a hardware breakpoint to the CPU
Bus Request
BR
Indicates that an external device requires bus mastership
System Clock Out
CLKOUT
System clock output
Chip Selects
CS[10:0]
Select external devices at programmed addresses
Boot Chip Select
CSBOOT
Chip-select for external boot start-up ROM
Data Bus
DATA[15:0]
16-bit data bus
Data Strobe
DS
Indicates that an external device should place valid data on the data
bus during a read cycle and that valid data has been placed on the
bus by the CPU during a write cycle
Data and Size
Acknowledge
DSACK[1:0]
Acknowledges to the SIM that data has been received for a write
cycle, or that data is valid on the data bus for a read cycle
Development Serial In,
Out, Clock
DSI, DSO,DSCLK
Serial I/O and clock for background debug mode
Crystal Oscillator
EXTAL, XTAL
Connections for clock synthesizer circuit reference; a crystal or an
external oscillator can be used
Function Codes
FC[2:0]
Identify processor state and current address space
Freeze
FREEZE
Indicates that the CPU has entered background debug mode
Halt
HALT
Suspend external bus activity
Instruction Pipeline
IPIPE[1:0]
Indicate instruction pipeline activity
Interrupt Request Level
IRQ[7:1]
Request interrupt service from the CPU
Clock Mode Select
MODCLK
Selects system clock source
Quotient Out
QUOT
Provides the quotient bit of the polynomial divider
Reset
RESET
System reset
Read/Write
R/W
Indicates the direction of data transfer on the bus
Size
SIZ[1:0]
Indicates the number of bytes to be transferred during a bus cycle
Three-State Control
TSC
Places all output drivers in a high impedance state
External Filter Capacitor
XFC
Connection for external phase-locked loop filter capacitor
Table 5 MCU Signal Characteristics (Continued)
Signal Name
MCU Module
Signal Type
Active State
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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