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| 型号： | MC68HC705F4FB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 1.789 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 90/130页 |
| 文件大小： | 10504K |
| 代理商： | MC68HC705F4FB |
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6-12
MC68HC05F4
16-BIT PROGRAMMABLE TIMER
6
The purpose of this procedure is to prevent the OC1F bit from being set between the time it is read
and the write to the corresponding output compare register.
All bits of the output compare register are readable and writable and are not altered by the timer
hardware or reset. If the compare function is not needed, the two bytes of the output compare
register can be used as storage locations.
6.4.2
Output compare register 2 (OCR2)
The 16-bit output compare register 2 is made up of two 8-bit registers at locations $0026 (MSB)
and $0027 (LSB). The contents of the output compare register 2 are compared with the contents
of the free-running counter continually and, if a match is found, the corresponding output compare
ag (OC2F) in the timer status register is set. If the timer compare 2 output enable bit (CO2E) is
set, the output level (OLVL2) is transferred to pin TCMP2. The output compare register 2 values
and the output level bit should be changed after each successful comparison to establish a new
elapsed timeout. An interrupt can also accompany a successful output compare provided the
corresponding interrupt enable bit (OC2IE) is set. (The free-running counter is updated every four
internal bus clock cycles.)
After a processor write cycle to the output compare register 2 containing the MSB ($0026), the
output compare function is inhibited until the LSB ($0027) is also written. The user must write both
bytes (locations) if the MSB is written rst. A write made only to the LSB ($0027) will not inhibit the
compare 2 function. The processor can write to either byte of the output compare register 2 without
affecting the other byte. If the timer compare output enable bit (CO2E) is set, the output level
(OLVL2) bit is clocked to the output level register and hence to the TCMP2 pin whether the output
compare 2 ag (OC2F) is set or clear. The minimum time required to update the output compare
register 2 is a function of the program rather than the internal hardware. Because the output
compare 2 ag and the output compare register 2 are not dened at power on, and not affected
by reset, care must be taken when initializing output compare functions with software. The
following procedure is recommended:
–
Write to output compare 2 high to inhibit further compares;
–
Read the timer status register to clear OC2F (if set);
–
Write to output compare 2 low to enable the output compare 2 function.
The purpose of this procedure is to prevent the OC2F bit from being set between the time it is read
and the write to the corresponding output compare register.
All bits of the output compare register are readable and writable and are not altered by the timer
hardware or reset. If the compare function is not needed, the two bytes of the output compare
register can be used as storage locations.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Output compare 2 high (OCR2H)
$0026
Undened
Output compare 2 low (OCR2H)
$0027
Undened
TPG
58
05F4Book Page 12 Tuesday, August 5, 1997 1:10 pm
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For More Information On This Product,
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC705G1B | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HC705J1A | 制造商:Freescale Semiconductor 功能描述: |
| MC68HC705J1ACDW | 功能描述:IC MCU 4MHZ 1.2K OTP 20-SOIC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C，IrDA，LIN，SPI，UART/USART 外围设备:DMA，PDR，POR，PVD，PWM，温度传感器，WDT 输入/输出数:26 程序存储器容量:64KB（64K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN，36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND |
| MC68HC705J1ACP | 功能描述:IC MCU 4MHZ 1.2K OTP 20-DIP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C，IrDA，LIN，SPI，UART/USART 外围设备:DMA，PDR，POR，PVD，PWM，温度传感器，WDT 输入/输出数:26 程序存储器容量:64KB（64K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN，36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND |
| MC68HC705J1ACPE | 功能描述:8位微控制器 -MCU HCO5 CORE+1.2K RAM + EPR RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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