参数资料
型号: MC68HC705V8FN
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 25/172页
文件大小: 890K
代理商: MC68HC705V8FN
SECTION 15: MESSAGE DATA LINK CONTROLLER
MOTOROLA
Page 109
MC68HC705V8 Specification Rev. 2.1
Access arbitration is simplified by the following rules:
The user must not read the Rx Buffer until the MDLC signals that an entire
message has been received (Receive Message Successful bit (RXMS) in
the MDLC Status Register (MSR) is set).
The user returns the Rx Buffer resource to the MDLC by writing any value
to the MDLC Receive Status Register (MRSR).
The user must not write to the Tx Buffer after the MDLC has been told to
transmit the message (length of message has been written to the MDLC
Transmit Control Register (MTCR)).
The user must wait until the MDLC has sent the message (indicated by a
CPU interrupt request and the Transmit Message Successful (TXMS) bit
being set), or the message has been aborted (Transmit Abort bit (TXAB)
in the MDLC Control Register (MCR) is toggled) before reloading the Tx
Buffer.
The MDLC has three 11 byte buffer arrays. The transmit circuitry uses a single Tx Buffer,
that for certain periods of time may have either the CPU or the MDLC access "locked out".
The receiver has two Rx Buffers but only one can appear in the MCU memory map at a
time. The CPU will have access to whichever Rx Buffer was filled the earliest. While the
CPU is reading data from one Rx Buffer, the MDLC may place incoming data into the other
Rx Buffer. When the CPU writes to the MRSR register, the Rx Buffer which the CPU had
access to is "given back" to the MDLC making it available for another incoming message.
The MDLC Tx Buffer is writable by the CPU at all times but it is not readable. A read of the
Tx buffer will result in an unknown value. The Rx Buffers can be read by the CPU at
anytime. However, writes to the Rx Buffer will not have an effect on the buffer’s content.
NOTE:
The contents of the Tx Buffer are not guaranteed to remain intact following
a transmission so the Tx Buffer should be completely reloaded for each
new message to be sent.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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