参数资料
型号: MC68HC711D3MP2
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP40
封装: PLASTIC, DIP-40
文件页数: 9/157页
文件大小: 2252K
代理商: MC68HC711D3MP2
Programmable Timer
Data Sheet
MC68HC711D3 — Rev. 2
106
Programmable Timer
MOTOROLA
8.4.5 Timer Counter Register
The 16-bit read-only timer count register (TCNT) contains the prescaled value of
the 16-bit timer. A full counter read addresses the most significant byte (MSB) first.
A read of this address causes the least significant byte (LSB) to be latched into a
buffer for the next CPU cycle so that a double-byte read returns the full 16-bit state
of the counter at the time of the MSB read cycle.
In normal modes, TCNT is read-only.
8.4.6 Timer Control 1 Register
The bits of the timer control 1 register (TCTL1) specify the action taken as a result
of a successful OCx compare.
OM2–OM5 — Output Mode Bits
OL2–OL5 — Output Level Bits
These control bit pairs are encoded to specify the action taken after a successful
OCx compare. OC5 functions only if the I4/O5 bit in the PACTL register is clear.
Refer to Table 8-3 for the coding.
Address: $000E — TCNT High
Bit 15
14
13
12
11
10
9
Bit 8
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 08
Write:
Reset:
00000000
Address: $000F — TCNT Low
Bit 7
654321
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00000000
= Unimplemented
Figure 8-10. Timer Counter Registers (TCNT)
Address:
$0020
Bit 7
654321
Bit 0
Read:
OM2OL2
OM3OL3
OM4OL4
OM5OL5
Write:
Reset:
00000000
Figure 8-11. Timer Control 1 Register (TCTL1)
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