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参数资料
| 型号： | MC68HC901FNR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 外设及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 48/73页 |
| 文件大小： | 274K |
| 代理商： | MC68HC901FNR2 |
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Universal Synchronous/Asynchronous Receiver-Transmitter
7-9
MC68HC901 USER’S MANUAL
MOTOROLA
1 = Character in the TSR was transmitted before a new word was loaded into the
transmit buffer.
0 = Transmitter disabled or read performed on TSR.
AT — Auto-Turnaround
When set, the receiver will be enabled automatically after the transmitter has been disabled
and the last character being transmitted is complete.
END — End of Transmission
If the transmitter is disabled while a character is being transmitted, this bit is set after
transmission is complete. if no character was being transmitted, then this bit is set
immediately. Re-enabling the transmitter clears this bit.
B — Break
This bit only functions in the asynchronous format. When B is set, BE cannot be set. A break
consists of all zeros with not stop bit. this bit cannot be set until transmitter is enabled and
internal reset and initialization is complete.
1 = Break transmitted and transmission stops.
0 = Break ceases and normal transmission resumes.
H, L — High and Low
These bits configure the transmitter output (SO) when the transmitter is disabled. Changing
these bits after the transmitter is enabled will not alter the output state until END is cleared.
TE — Transmitter Enable
The serial output will be driven according to H and L bits until transmission begins. A one bit
is transmitted before character transmission in the TSR begins.
1 = Transmitter enabled.
0 = Transmitter disabled. The UE bit is cleared and the END bit is set.
7.4 DMA OPERATION
USART error conditions are valid only for each character boundary. When the USART
performs block data transfers by using the DMA handshake lines receiver ready (RR) and
transmitter ready (TR), errors must be saved and checked at the end of a block. This is
accomplished by enabling the error channel for the receiver or transmitter and by masking
H
L
OUTPUT STATE
0
High Impedance
o
1
Low
1
0
High
1
Loopback Mode
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