
Oscillator Module (OSC)
Low Power Modes
MC68HLC908QY/QT Family — Rev. 2
Data Sheet
MOTOROLA
Oscillator Module (OSC)
99
11.4.6 Internal Oscillator Clock (INTCLK)
INTCLK is the internal oscillator output signal. Its nominal frequency is fixed to
4.0 MHz, but it can be also trimmed using the oscillator trimming feature of the
11.4.7 Oscillator Out 2 (BUSCLKX4)
BUSCLKX4 is the same as the input clock (XTALCLK, RCCLK, or INTCLK). This
signal is driven to the SIM module and is used to determine the COP cycles.
11.4.8 Oscillator Out (BUSCLKX2)
The frequency of this signal is equal to half of the BUSCLKX4, this signal is driven
to the SIM for generation of the bus clocks used by the CPU and other modules on
the MCU. BUSCLKX2 will be divided again in the SIM and results in the internal
bus frequency being one fourth of either the XTALCLK, RCCLK, or INTCLK
frequency.
11.5 Low Power Modes
The WAIT and STOP instructions put the MCU in low-power consumption standby
modes.
11.5.1 Wait Mode
The WAIT instruction has no effect on the oscillator logic. BUSCLKX2 and
BUSCLKX4 continue to drive to the SIM module.
11.5.2 Stop Mode
The STOP instruction disables either the XTALCLK, the RCCLK, or INTCLK
output, hence BUSCLKX2 and BUSCLKX4.
11.6 Oscillator During Break Mode
The oscillator continues to drive BUSCLKX2 and BUSCLKX4 when the device
enters the break state.
11.7 CONFIG2 Options
Two CONFIG2 register options affect the operation of the oscillator module:
OSCOPT1 and OSCOPT0. All CONFIG2 register bits will have a default
information on how the CONFIG2 register is used.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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