参数资料
型号: MC68HRC705J5ACDWR3
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封装: SOIC-20
文件页数: 73/106页
文件大小: 1069K
代理商: MC68HRC705J5ACDWR3
July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
INSTRUCTION SET
MOTOROLA
REV 2.1
10-1
SECTION 10
INSTRUCTION SET
This section describes the addressing modes and instruction types.
10.1
ADDRESSING MODES
The CPU uses eight addressing modes for exibility in accessing data. The
addressing modes dene the manner in which the CPU nds the data required to
execute an instruction. The eight addressing modes are the following:
Inherent
Immediate
Direct
Extended
Indexed, No Offset
Indexed, 8-Bit Offset
Indexed, 16-Bit Offset
Relative
10.1.1 Inherent
Inherent instructions are those that have no operand, such as return from interrupt
(RTI) and stop (STOP). Some of the inherent instructions act on data in the CPU
registers, such as set carry ag (SEC) and increment accumulator (INCA).
Inherent instructions require no memory address and are one byte long.
10.1.2 Immediate
Immediate instructions are those that contain a value to be used in an operation
with the value in the accumulator or index register. Immediate instructions require
no memory address and are two bytes long. The opcode is the rst byte, and the
immediate data value is the second byte.
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