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参数资料
| 型号： | MC7447RX1267LB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1267 MHz, RISC PROCESSOR, CBGA360 |
| 封装： | 25 X 25 MM, 3.24 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件页数： | 12/72页 |
| 文件大小： | 1598K |
| 代理商： | MC7447RX1267LB |
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MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7
2
Freescale Semiconductor
Features
high-bandwidth interface. The MPC7447 is identical to the MPC7457 except that it does not support the
L3 cache interface.
Figure 1 shows a block diagram of the MPC7457. The core is a high-performance superscalar design
supporting a double-precision floating-point unit and a SIMD multimedia unit.
The memory storage subsystem supports the MPX bus protocol and a subset of the 60x bus protocol to
main memory and other system resources. The L3 interface supports 1, 2, or 4 Mbytes of external SRAM
for L3 cache and/or private memory data. For systems implementing 4 Mbytes of SRAM, a maximum of
2 Mbytes may be used as cache; the remaining 2 Mbytes must be private memory.
Note that the MPC7457 is a footprint-compatible, drop-in replacement in a MPC7455 application if the
core power supply is 1.3 V.
2Features
This section summarizes features of the MPC7457 implementation of the PowerPC architecture.
Major features of the MPC7457 are as follows:
High-performance, superscalar microprocessor
— As many as four instructions can be fetched from the instruction cache at a time.
— As many as three instructions can be dispatched to the issue queues at a time.
— As many as 12 instructions can be in the instruction queue (IQ).
— As many as 16 instructions can be at some stage of execution simultaneously.
— Single-cycle execution for most instructions
— One instruction per clock cycle throughput for most instructions
— Seven-stage pipeline control
Eleven independent execution units and three register files
— Branch processing unit (BPU) features static and dynamic branch prediction
– 128-entry (32-set, four-way set associative) branch target instruction cache (BTIC), a cache
of branch instructions that have been encountered in branch/loop code sequences. If a target
instruction is in the BTIC, it is fetched into the instruction queue a cycle sooner than it can
be made available from the instruction cache. Typically, a fetch that hits the BTIC provides
the first four instructions in the target stream.
– 2048-entry branch history (BHT) with 2 bits per entry for 4 levels of prediction—not-taken,
strongly not-taken, taken, and strongly taken
– Up to three outstanding speculative branches
– Branch instructions that do not update the count register (CTR) or link register (LR) are
often removed from the instruction stream.
– Eight-entry link register stack to predict the target address of Branch Conditional to Link
Register (bclr) instructions
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相关代理商/技术参数 |
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| MC7447RX600NB | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:PPC7457RX1000NB |
| MC7447RX733NB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
| MC7447RX867NB | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:PPC7457RX1000NB |
| MC7448HX1000LC | 功能描述:IC MPU RISC 32BIT 360-FCCBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:MPC74xx 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| MC7448HX1000LD | 功能描述:微处理器 - MPU APL8 RV2.2.1 1.15V 105C RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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