
Standard Timer Module
MC68HC812A4 Data Sheet, Rev. 7
142
Freescale Semiconductor
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;
MAIN PROGRAM
; ----------------------------------------------------------------------
ORG
$7000
; 16K On-Board RAM, User code data area,
;
; start main program at $7000
MAIN:
BSR
TIMERINIT
; Subroutine used to initialize the timer:
;
; Output compare channel, no interrupts
BSR
SQWAVE
; Subroutine to generate square wave
DONE:
BRA
DONE
; Branch to itself, Convinient for Breakpoint
;* -----------------------------------------------------------------
;*
Subroutine TIMERINIT: Initialize Timer for Output Compare on OC2
;* -----------------------------------------------------------------
TIMERINIT:
CLR
TMSK1
; Disable All Interrupts
MOVB
#$02,TMSK2
; Disable overflow interrupt, disable pull-up
;
; resistor function with normal drive capability
;; and free running counter, Prescaler = sys clock/4.
MOVB
#$10,TCTL2
; Initialize OC2 to toggle on successful compare.
MOVB
#$04,TIOS
; Select Channel 2 to act as output compare.
MOVW
#$0400,TC2H
; Load TC2 Reg with initial compare value.
MOVB
#$80,TSCR
; Enable Timer, Timer runs during wait state, and
;
; while in Background Mode, also clear flags
;
; normally.
RTS
; Return from Subroutine
;* ------------------------------
;*
SUBROUTINE:
SQWAVE
;* ------------------------------
SQWAVE:
;* -------
CLEARFLG:
;* -------
;*
To clear the C2F flag: 1) read TFLG1 when
;*
C2F is set and then 2) write a logic "one" to C2F.
LDAA
TFLG1
; To clear OC2 Flag, first it must be read,
ORAA
#$04
; then a "1" must be written to it
STAA
TFLG1
WTFLG:
BRCLR
TFLG1,#$04,WTFLG; Wait (Polling) for C2F Flag
LDD
TC2H
; Loads value of compare from TC2 Reg.
ADDD
#$0400
; Add hex value of 500us High Time
STD
TC2H
; Set-up next transition time in 500 us
BRA
CLEARFLG
; Continuously add 500 us, branch to CLEARFLAG
RTS
; return from Subroutine
END
; End of program