参数资料
型号: MC8641DTVU1333JE
厂商: Freescale Semiconductor
文件页数: 106/130页
文件大小: 0K
描述: IC MPU DUAL CORE E600 1023FCCBGA
标准包装: 1
系列: MPC86xx
处理器类型: 32-位 MPC86xx PowerPC
速度: 1.333GHz
电压: 1.05V
安装类型: 表面贴装
封装/外壳: 1023-BCBGA,FCCBGA
供应商设备封装: 1023-FCCBGA(33x33)
包装: 托盘
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
77
Serial RapidIO
Figure 52. Compliance Test/Measurement Load
15 Serial RapidIO
This section describes the DC and AC electrical specifications for the RapidIO interface of the MPC8641,
for the LP-Serial physical layer. The electrical specifications cover both single and multiple-lane links.
Two transmitter types (short run and long run) on a single receiver are specified for each of three baud
rates, 1.25, 2.50, and 3.125 GBaud.
Two transmitter specifications allow for solutions ranging from simple board-to-board interconnect to
driving two connectors across a backplane. A single receiver specification is given that will accept signals
from both the short run and long run transmitter specifications.
The short run transmitter specifications should be used mainly for chip-to-chip connections on either the
same printed circuit board or across a single connector. This covers the case where connections are made
to a mezzanine (daughter) card. The minimum swings of the short run specification reduce the overall
power used by the transceivers.
The long run transmitter specifications use larger voltage swings that are capable of driving signals across
backplanes. This allows a user to drive signals across two connectors and a backplane. The specifications
allow a distance of at least 50 cm at all baud rates.
All unit intervals are specified with a tolerance of +/– 100 ppm. The worst case frequency difference
between any transmit and receive clock will be 200 ppm.
To ensure interoperability between drivers and receivers of different vendors and technologies, AC
coupling at the receiver input must be used.
15.1
DC Requirements for Serial RapidIO SD
n_REF_CLK and
SD
n_REF_CLK
For more information, see Section 13.2, “SerDes Reference Clocks.”
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