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参数资料
| 型号： | MC88LV915TFN |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 88LV SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 6/11页 |
| 文件大小： | 459K |
| 代理商： | MC88LV915TFN |
4
MOTOROLA
MAXIMUM RATINGS*
Symbol
Parameter
Limits
Unit
VCC, AVCC
DC Supply Voltage Referenced to GND
–0.5 to 7.0
V
Vin
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Iin
DC Input Current, Per Pin
±20
mA
Iout
DC Output Sink/Source Current, Per Pin
±50
mA
ICC
DC VCC or GND Current Per Output Pin
±50
mA
Tstg
Storage Temperature
–65 to +150
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Limits
Unit
VCC
Supply Voltage
3.3
±0.3
V
Vin
DC Input Voltage
0 to VCC
V
Vout
DC Output Voltage
0 to VCC
V
TA
Ambient Operating Temperature
0 to 70
°C
ESD
Static Discharge Voltage
> 1000
V
DC CHARACTERISTICS (TA = 0°C to 70°C; VCC = 3.3V ± 0.3V)
Symbol
Parameter
VCC
Guaranteed Limits
Unit
Condition
VIH
Minimum High Level Input Voltage
3.0
3.3
2.0
V
VOUT = 0.1V or
VCC – 0.1V
VIL
Minimum Low Level Input Voltage
3.0
3.3
0.8
V
VOUT = 0.1V or
VCC – 0.1V
VOH
Minimum High Level Output Voltage
3.0
3.3
2.4
2.7
V
VIN = VIH or VIL
IOH= –24mA
VOL
Minimum Low Level Output Voltage
3.0
3.3
0.44
V
VIN = VIH or VIL
IOH= 24mA
IIN
Maximum Input Leakage Current
3.6
±1.0
A
VI = VCC, GND
ICCT
Maximum ICC/Input
3.6
2.0
mA
VI = VCC – 2.1V
IOLD
Minimum Dynamic3 Output Current
3.6
+50
mA
VOLD = 1.25V
IOHD
3.6
–50
mA
VOHD =2.35V
ICC
Maximum Quiescent Supply Current
3.6
TBD
A
VI = VCC, GND
1. IOL is +12mA for the RST_OUT output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration 2.0ms, one output loaded at a time.
SYNC INPUT TIMING REQUIREMENTS
Symbol
Parameter
Minimum
Maximum
Unit
tRISE/FALL
SYNC Input
Rise/Fall Time, SYNC Input
From 0.8V to 2.0V
—
5.0
ns
tCYCLE,
SYNC Input
Input Clock Period
SYNC Input
1
f2X_Q 4
100
ns
Duty Cycle
Duty Cycle, SYNC Input
50%
± 25%
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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MC88LV915T
Low Voltage Low Skew CMOS PLL Clock Driver, 3-State
NETCOM
IDT Low Voltage Low Skew CMOS PLL Clock Driver, 3-State
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC88LV915T
4
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