参数资料
型号: MC9328MX1VM20
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 200 MHz, RISC PROCESSOR, PBGA256
封装: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件页数: 59/94页
文件大小: 1487K
代理商: MC9328MX1VM20
62
MC9328MX1 Advance Information
MOTOROLA
Specifications
3.14.1 Command Response Timing on MMC/SD Bus
The card identification and card operation conditions timing are processed in open-drain mode. The card
response to the host command starts after exactly NID clock cycles. For the card address assignment,
SET_RCA is also processed in the open-drain mode. The minimum delay between the host command and
card response is NCR clock cycles as illustrated in Figure 48. The symbols for Figure 48 through Figure 52
are defined in Table 30.
3b
Clock low time1
—10/30 cards
15/75
10/50
ns
4a
Clock fall time1
—10/30 cards
10/50
(5.00)3
10/50
ns
4b
Clock rise time1
—10/30 cards
14/67
(6.67)3
10/50
ns
5a
Input hold time3
—10/30 cards
5.7/5.7
5/5
ns
5b
Input setup time3
—10/30 cards
5.7/5.7
5/5
ns
6a
Output hold time3
—10/30 cards
5.7/5.7
5/5
ns
6b
Output setup time3
—10/30 cards
5.7/5.7
5/5
ns
7
Output delay time3
0
16
0
14
ns
1.
CL
100 pF / 250 pF (10/30 cards)
2.
CL
250 pF (21 cards)
3.
CL
25 pF (1 card)
Table 30. State Signal Parameters for Figure 48 through Figure 52
Card Active
Host Active
Symbol
Definition
Symbol
Definition
Z
High impedance state
S
Start bit (0)
D
Data bits
T
Transmitter bit
(Host = 1, Card = 0)
*
Repetition
P
One-cycle pull-up (1)
CRC
Cyclic redundancy check bits (7 bits)
E
End bit (1)
Table 29. SDHC Bus Timing Parameter Table (Continued)
Ref
No.
Parameter
1.8V +/- 0.10V
3.0V +/- 0.30V
Unit
Min
Max
Min
Max
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