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参数资料
| 型号： | MC9328MX1VM20 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 200 MHz, RISC PROCESSOR, PBGA256 |
| 封装： | 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256 |
| 文件页数： | 67/94页 |
| 文件大小： | 1487K |
| 代理商： | MC9328MX1VM20 |
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Signals and Connections
MOTOROLA
MC9328MX1 Advance Information
7
TDI
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
TCK
Test Clock to synchronize test logic and control register access through the JTAG port.
TMS
Test Mode Select to sequence the JTAG test controller’s state machine. Sampled on the
rising edge of TCK.
System
BIG_ENDIAN
BIG_ENDIAN—This signal determines the memory endian configuration. BIG_ENDIAN is
a static pin to inner module. If the pin is driven logic-high the memory system is configured
into big endian. If it is driven logic-low the memory system is configured into little endian.
The pin is not supposed to be changed on the fly.
ETM
ETMTRACESYNC
ETM sync signal which is multiplexed with A24. ETMTRACESYNC is selected in ETM
mode.
ETMTRACECLK
ETM clock signal which is multiplexed with A23. ETMTRACECLK is selected in ETM
mode.
ETMPIPESTAT [2:0]
ETM status signals which are multiplex with A [22:20]. ETMPIPESTAT [2:0] are selected in
ETM mode.
ETMTRACEPKT [7:0]
ETM packet signals which are multiplex with ECB, LBA, BCLK, PA17, A [19:16].
ETMTRACEPKT [7:0] are selected in ETM mode.
CMOS Sensor Interface
CSI_D [7:0]
Sensor port data
CSI_MCLK
Sensor port master clock
CSI_VSYNC
Sensor port vertical sync
CSI_HSYNC
Sensor port horizontal sync
CSI_PIXCLK
Sensor port data latch clock
LCD Controller
LD [15:0]
LCD Data Bus—All LCD signals are driven low after reset and when LCD is off.
FLM/VSYNC
Frame Sync or Vsync—This signal also serves as the clock signal output for gate.
driver (dedicated signal SPS for Sharp panel HR-TFT).
LP/HSYNC
Line Pulse or H Sync
LSCLK
Shift Clock
ACD/OE
Alternate Crystal Direction/Output Enable
CONTRAST
This signal is used to control the LCD bias voltage as contrast control.
SPL_SPR
Program horizontal scan direction (Sharp panel dedicated signal).
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC9328MX1VM20R2 | 功能描述:处理器 - 专门应用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432 |
| MC9328MX21 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors |
| MC9328MX21_06 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors |
| MC9328MX21_09 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors |
| MC9328MX21_10 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:266 MHz i.MX family of microprocessors |
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