参数资料
型号: MC9328MX1VM20
厂商: Freescale Semiconductor
文件页数: 68/100页
文件大小: 0K
描述: IC MCU I.MX 200MHZ 256-MAPBGA
标准包装: 152
系列: i.MX1
核心处理器: ARM9
芯体尺寸: 32-位
速度: 200MHz
连通性: EBI/EMI,I²C,MMC,智能卡,SPI,SSI,UART/USART,USB
外围设备: DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 110
程序存储器类型: ROMless
电压 - 电源 (Vcc/Vdd): 1.7 V ~ 3.3 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 256-MAPBGA
包装: 托盘
Signals and Connections
MC9328MX1 Technical Data, Rev. 7
Freescale Semiconductor
7
SIM_TX
Transmit Data
SIM_PD
Presence Detect Schmitt trigger input
SIM_SVEN
SIM Vdd Enable
SPI 1 and SPI 2
SPI1_MOSI
Master Out/Slave In
SPI1_MISO
Slave In/Master Out
SPI1_SS
Slave Select (Selectable polarity)
SPI1_SCLK
Serial Clock
SPI1_SPI_RDY
Serial Data Ready
SPI2_TXD
SPI2 Master TxData Output—This signal is multiplexed with a GPI/O pin yet shows up as a primary or
alternative signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in
the MC9328MX1 Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_RXD
SPI2 Master RxData Input—This signal is multiplexed with a GPI/O pin yet shows up as a primary or
alternative signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in
the MC9328MX1 Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_SS
SPI2 Slave Select—This signal is multiplexed with a GPI/O pin yet shows up as a primary or alternative
signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in the
MC9328MX1 Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_SCLK
SPI2 Serial Clock—This signal is multiplexed with a GPI/O pin yet shows up as a primary or alternative
signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in the
MC9328MX1 Reference Manual for information about how to bring this signal to the assigned pin.
General Purpose Timers
TIN
Timer Input Capture or Timer Input Clock—The signal on this input is applied to both timers
simultaneously.
TMR2OUT
Timer 2 Output
USB Device
USBD_VMO
USB Minus Output
USBD_VPO
USB Plus Output
USBD_VM
USB Minus Input
USBD_VP
USB Plus Input
USBD_SUSPND
USB Suspend Output
USBD_RCV
USB Receive Data
USBD_ROE
USB OE
USBD_AFE
USB Analog Front End Enable
Secure Digital Interface
SD_CMD
SD Command—If the system designer does not wish to make use of the internal pull-up, via the Pull-up
enable register, a 4.7K–69K external pull up resistor must be added.
Table 2. i.MX1 Signal Descriptions (Continued)
Signal Name
Function/Notes
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