
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Freescale Semiconductor
73
Chapter 6
Parallel Input/Output
This section explains software controls related to parallel input/output (I/O). The MC9S08RC/RD/RE/RG
has ve I/O ports that include a total of 39 general-purpose I/O pins (two of these pins are output only and
one pin is input only). Not all of the ports are available in all packages. See
Chapter 2, “Pins andConnections,” for more information about the logic and hardware aspects of these pins. Many of these pins are shared with on-chip peripherals such as timer systems, external interrupts, or
keyboard interrupts. When these other modules are not controlling the port pins, they revert to
general-purpose I/O control. For each I/O pin, a port data bit provides access to input (read) and output
(write) data. A data direction bit controls the direction of the pin and a pullup enable bit enables an internal
pullup device (if the pin is congured as an input).
NOTE
Not all general-purpose I/O pins are available on all packages. To avoid
extra current drain from oating input pins, the user’s reset initialization
routine in the application program should either enable on-chip pullup
devices or change the direction of unconnected pins to outputs so the pins
do not oat.
6.2
Features
Parallel I/O features for the MC9S08RC/RD/RE/RG MCUs, depending on specic device and package
choice, include:
A total of 39 general-purpose I/O pins in ve ports (two pins are output only, one is input only)
High-current drivers on port B pins
Hysteresis input buffers on all inputs
Software-controlled pullups on each input pin
Eight port A pins shared with KBI1
Eight port B pins shared with SCI and TPMCH1
Eight port C pins shared with KBI2 and SPI
Seven port D pins shared with TPMCH0, ACMP, IRQ, RESET, and BKGD/MS
Eight port E pins