
Introduction
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Freescale Semiconductor
17
1.3
MCU Block Diagram
This block diagram shows the structure of the MC9S08RC/RD/RE/RG MCUs
Figure 1-1. MC9S08RC/RD/RE/RG Block Diagram
Table 1-2 lists the functional versions of the on-chip modules.
PTD3
PTD4/ACMP1–
PTD5/ACMP1+
PTD6/TPM1CH0
PTC1/KBI2P1
PTC0/KBI2P0
VSS
VDD
PTB3
PTB2
PTA7/KBI1P7–
PTB0/TxD1
PTB1/RxD1
PTD2/IRQ
PTD1/RESET
PTD0/BKGD/MS
PTC7/SS1
PTC6/SPSCK1
PTC5/MISO1
PTC4/MOSI1
PTC3/KBI2P3
PTC2/KBI2P2
POR
T
A
POR
T
C
POR
T
D
POR
T
B
8-BIT KEYBOARD
INTERRUPT MODULE (KBI1)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI1)
USER FLASH
USER RAM
(RC/RD/RE/RG32/60 = 2048 BYTES)
DEBUG
MODULE (DBG)
(RC/RD/RE/RG60 = 63,364 BYTES)
HCS08 CORE
BDC
CPU
NOTES:
1. Port pins are software configurable with pullup device if input port
2. PTA0 does not have a clamp diode to VDD. PTA0 should not be driven above VDD. Also, PTA0 does not pullup to
VDD when internal pullup is enabled.
3. IRQ pin contains software configurable pullup/pulldown device if IRQ enabled (IRQPE = 1)
4. The RESET pin contains integrated pullup device enabled if reset enabled (RSTPE = 1)
5. High current drive
6. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown enabled when KBI is enabled (KBIPEn = 1) and
rising edge is selected (KBEDGn = 1).
NOTES
NOTES 1, 5
2-CHANNEL TIMER/PWM
MODULE (TPM1)
PTE7–
POR
T
E
PTB5
PTB4
PTE6
PTB7/TPM1CH1
MODULE (ACMP1)
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
VOLTAGE
REGULATOR
RTI
ANALOG COMPARATOR
COP
IRQ
LVD
INTERNAL BUS
LOW-POWER OSCILLATOR
INTERFACE MODULE (SCI1)
SERIAL COMMUNICATIONS
7
PTA1/KBI1P1
8
PTE0
NOTE 1
NOTES1, 2, 6
NOTE 1
(RC/RD/RE/RG32 = 32,768 BYTES)
(RC/RD/RE8/16 = 1024 BYTES)
(RC/RD/RE16 = 16,384 BYTES)
XTAL
EXTAL
CARRIER MODULATOR
TIMER MODULE (CMT)
1, 3, 4
4-BIT KEYBOARD
INTERRUPT MODULE (KBI2)
IRO NOTE 5
PTA0/KBI1P0
(RC/RD/RE8 = 8192 BYTES)