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参数资料
| 型号： | MCF51MM128CMB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 50.33 MHz, MICROCONTROLLER, PBGA81 |
| 封装： | 10 X 10 MM, ROHS COMPLIANT, MAPBGA-81 |
| 文件页数： | 32/58页 |
| 文件大小： | 609K |
| 代理商： | MCF51MM128CMB |
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Electrical Characteristics
Freescale Semiconductor
38
2
This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed, DMX32 bit is
changed, DRS bit is changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a
crystal/resonator is being used as the reference, this specification assumes it is already running.
3
This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE,
BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is already
running.
4
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected
into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a given interval.
5
625 ns represents 5 time quanta for CAN applications, under worst-case conditions of 8 MHz CAN bus clock, 1 Mbps CAN Bus
speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a synchronization edge and the
sample point of a bit using 8 time quanta per bit.
6
Below Dlock minimum, the MCG is guaranteed to enter lock. Above Dlock maximum, the MCG will not enter lock. But if the MCG is
already in lock, then the MCG may stay in lock.
7
Below Dunl minimum, the MCG will not exit lock if already in lock. Above Dunl maximum, the MCG is guaranteed to exit lock.
Table 19. XOSC (Temperature Range = –40 to 105°C Ambient)
#
Characteristic
Symbol
Min
Typ1
Max
Unit
C
1
Oscillator crystal or resonator
(EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
flo
32
—
38.4
kHz
D
High range (RANGE = 1),
FEE or FBE mode 2
fhi-fll
1—
5
MHz
D
High range (RANGE = 1),
PEE or PBE mode 3
fhi-pll
1—
16
MHz
D
High range (RANGE = 1),
High gain (HGO = 1),
BLPE mode
fhi-hgo
1—
16
MHz
D
High range (RANGE = 1),
Low power (HGO = 0),
BLPE mode
fhi-lp
1—
8
MHz
D
2
Load capacitors
C1
C2
See crystal or resonator manufacturer’s
recommendation.
D
3
Feedback resistor
Low range
(32 kHz to 38.4 kHz)
RF
—
10
—
M
D
High range
(1 MHz to 16 MHz)
——
1
—
D
4
Series resistor — Low range
Low Gain (HGO = 0)
RS
—0
—
k
D
High Gain (HGO = 1)
—
100
—
D
5
Series resistor — High range
Low Gain (HGO = 0)
RS
—0
—
k
D
High Gain (HGO = 1)
D
8 MHz
—
0
D
4 MHz
—
0
10
D
1 MHz
—
0
20
D
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
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