参数资料
型号: MCF51QF32VHX
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: FLASH, 50 MHz, MICROCONTROLLER, QCC64
封装: 9 X 9 MM, QFN-64
文件页数: 15/72页
文件大小: 1031K
代理商: MCF51QF32VHX
Table 14. MCG specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
fdco
DCO output
frequency range
Low range (DRS=00)
640 × ffll_ref
20
20.97
25
MHz
3, 4
Mid range (DRS=01)
1280 × ffll_ref
40
41.94
50
MHz
Mid-high range (DRS=10)
1920 × ffll_ref
60
62.91
75
MHz
High range (DRS=11)
2560 × ffll_ref
80
83.89
100
MHz
fdco_t_DMX3
2
DCO output
frequency
Low range (DRS=00)
732 × ffll_ref
23.99
MHz
5, 6
Mid range (DRS=01)
1464 × ffll_ref
47.97
MHz
Mid-high range (DRS=10)
2197 × ffll_ref
71.99
MHz
High range (DRS=11)
2929 × ffll_ref
95.98
MHz
Jcyc_fll
FLL period jitter
TBD
ps
Jacc_fll
FLL accumulated jitter of DCO output over a 1s
time window
TBD
ps
tfll_acquire
FLL target frequency acquisition time
1
ms
PLL
fvco
VCO operating frequency
48.0
100
MHz
Ipll
PLL operating current
PLL @ 96 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
2 MHz, VDIV multiplier = 48)
1060
A
Ipll
PLL operating current
PLL @ 48 MHz (fosc_hi_1 = 8 MHz, fpll_ref =
2 MHz, VDIV multiplier = 24)
600
A
fpll_ref
PLL reference frequency range
2.0
4.0
MHz
Jcyc_pll
PLL period jitter (RMS)
fvco = 48 MHz
fvco = 100 MHz
120
50
ps
Jacc_pll
PLL accumulated jitter over 1s (RMS)
fvco = 48 MHz
fvco = 100 MHz
1350
600
ps
Table continues on the next page...
Clock modules
MCF51JF128 Advance Information Data Sheet, Rev. 3, 08/2011.
22
Preliminary
Freescale Semiconductor, Inc.
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