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| 型号： | MCF5208CVM166 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 22/46页 |
| 文件大小： | 0K |
| 描述： | IC MCU 32-BIT 196-MAPBGA |
| 标准包装： | 126 |
| 系列： | MCF520x |
| 核心处理器： | Coldfire V2 |
| 芯体尺寸： | 32-位 |
| 速度： | 166.67MHz |
| 连通性： | EBI/EMI，以太网，I²C，SPI，UART/USART |
| 外围设备： | DMA，WDT |
| 输入/输出数： | 50 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 16K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.4 V ~ 3.6 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 196-LBGA |
| 包装： | 托盘 |
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Electrical Characteristics
MCF5208 ColdFire Microprocessor Data Sheet, Rev. 3
Freescale Semiconductor
29
5.8.1
SDR SDRAM AC Timing Characteristics
The following timing numbers indicate when data will be latched or driven onto the external bus, relative
to the memory bus clock, when operating in SDR mode on write cycles and relative to SD_DQS on read
cycles. The SDRAM controller is a DDR controller with an SDR mode. Because it is designed to support
DDR, a DQS pulse must remain supplied to the device for each data beat of an SDR read. The ColdFire
processor accomplishes this by asserting a signal called SD_SDR_DQS during read cycles. Take care
during board design to adhere to the following guidelines and specs with regard to the SD_SDR_DQS
signal and its usage.
Table 12. SDR Timing Specifications
Symbol
Characteristic
Symbol
Min
Max
Unit
Notes
Frequency of Operation
60
83.33
MHz
1
NOTES:
1 The device supports the same frequency of operation for FlexBus and SDRAM as that of the internal bus clock. Please see the
PLL chapter of the MCF5208 Reference Manual for more information on setting the SDRAM clock rate.
SD1
Clock Period (tCK)tSDCK
12
16.67
ns
2
2 SD_CLK is one SDRAM clock in (ns).
SD3
Pulse Width High (tCKH)tSDCKH
0.45
0.55
SD_CLK
3
3 Pulse width high plus pulse width low cannot exceed min and max clock period.
SD4
Pulse Width Low (tCKL)tSDCKL
0.45
0.55
SD_CLK
3
SD5
Address, SD_CKE, SD_CAS, SD_RAS, SD_WE,
SD_BA, SD_CS[1:0] - Output Valid (tCMV)
tSDCHACV
—0.5
× SD_CLK
+1.0
ns
SD6
Address, SD_CKE, SD_CAS, SD_RAS, SD_WE,
SD_BA, SD_CS[1:0] - Output Hold (tCMH)
tSDCHACI
2.0
—
ns
SD7
SD_SDR_DQS Output Valid (tDQSOV)tDQSOV
—Self timed
ns
4
4 SD_DQS is designed to pulse 0.25 clock before the rising edge of the memory clock. This is a guideline only. Subtle variation from
this guideline is expected. SD_DQS only pulses during a read cycle and one pulse occurs for each data beat.
SD8
SD_DQS[3:2] input setup relative to SD_CLK (tDQSIS)tDQVSDCH 0.25 × SD_CLK 0.40 × SD_CLK
ns
5
5 SDR_DQS is designed to pulse 0.25 clock before the rising edge of the memory clock. This spec is a guideline only. Subtle
variation from this guideline is expected. SDR_DQS only pulses during a read cycle and one pulse occurs for each data beat.
SD9
SD_DQS[3:2] input hold relative to SD_CLK (tDQSIH)tDQISDCH
Does not apply. 0.5 SD_CLK fixed width.
6
6 The SDR_DQS pulse is designed to be 0.5 clock in width. The timing of the rising edge is most important. The falling edge does
not affect the memory controller.
SD10
Data (D[31:0]) Input Setup relative to SD_CLK
(reference only) (tDIS)
tDVSDCH 0.25 × SD_CLK
—
ns
7
7 Because a read cycle in SDR mode continues using the DQS circuit within the device, it is most critical that the data valid window
be centered 1/4 clk after the rising edge of DQS. Ensuring that this happens results in successful SDR reads. The input setup spec
is provided as guidance.
SD11
Data Input Hold relative to SD_CLK (reference only)
(tDIH)
tDISDCH
1.0
—
ns
SD12
Data (D[31:0]) and Data Mask(SD_DQM[3:0]) Output
Valid (tDV)
tSDCHDMV
—0.75
× SD_CLK
+ 0.5
ns
SD13
Data (D[31:0]) and Data Mask (SD_DQM[3:0]) Output
Hold (tDH)
tSDCHDMI
1.5
—
ns
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCF5208CVM166J | 功能描述:32位微控制器 - MCU ColdFire Micro-Proc RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MCF5208EC | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor |
| MCF5208EC_08 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MCF5208 ColdFire? Microprocessor Data Sheet |
| MCF52100CAE66 | 功能描述:32位微控制器 - MCU KIRIN0 WITHOUT USB RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MCF52100CAE80 | 功能描述:32位微控制器 - MCU KIRIN0 WITHOUT USB RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
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