参数资料
型号: MCF52256VN80J
厂商: Freescale Semiconductor
文件页数: 20/46页
文件大小: 0K
描述: IC MCU 256KB FLASH 144MAPBGA
标准包装: 160
系列: MCF5225x
核心处理器: Coldfire V2
芯体尺寸: 32-位
速度: 80MHz
连通性: CAN,EBI/EMI,以太网,I²C,QSPI,UART/USART,USB OTG
外围设备: DMA,LVD,POR,PWM,WDT
输入/输出数: 96
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 144-LBGA
包装: 托盘
MCF52259 ColdFire Microcontroller, Rev. 5
Electrical Characteristics
Freescale
27
100 LQFP
Junction to ambient, natural convection
Single layer board (1s)
JA
C/W
Junction to ambient, natural convection
Four layer board (2s2p)
JA
C/W
Junction to ambient, (@200 ft/min)
Single layer board (1s)
JMA
C/W
Junction to ambient, (@200 ft/min)
Four layer board (2s2p)
JMA
C/W
Junction to board
JB
2516
C/W
Junction to case
JC
C/W
Junction to top of package
Natural convection
jt
C/W
Maximum operating junction temperature
Tj
105
oC
1
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
3 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
4 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
6 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
7
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
8 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
9 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
10 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
11 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
12 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
13
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
14 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
15 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
Table 8. Thermal Characteristics (continued)
Characteristic
Symbol
Value
Unit
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