参数资料
型号: MCF52256VN80J
厂商: Freescale Semiconductor
文件页数: 43/46页
文件大小: 0K
描述: IC MCU 256KB FLASH 144MAPBGA
标准包装: 160
系列: MCF5225x
核心处理器: Coldfire V2
芯体尺寸: 32-位
速度: 80MHz
连通性: CAN,EBI/EMI,以太网,I²C,QSPI,UART/USART,USB OTG
外围设备: DMA,LVD,POR,PWM,WDT
输入/输出数: 96
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 32K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 144-LBGA
包装: 托盘
Family Configurations
MCF52259 ColdFire Microcontroller, Rev. 5
Freescale
6
— DMA or FIFO data stream interfaces
— Low power consumption
— OTG protocol logic
Fast Ethernet controller (FEC)
— 10/100 BaseT/TX capability, half duplex or full duplex
— On-chip transmit and receive FIFOs
— Built-in dedicated DMA controller
— Memory-based flexible descriptor rings
Mini-FlexBus
— External bus interface available on 144 pin packages
— Supports glueless interface with 8-bit ROM/flash/SRAM/simple slave peripherals. Can address up to 2 MB of
addresses
— 2 chip selects (FB_CS[1:0])
— Non-multiplexed mode: 8-bit dedicated data bus, 20-bit address bus
— Multiplexed mode: 16-bit data and 20-bit address bus
— FB_CLK output to support synchronous memories
— Programmable base address, size, and wait states to support slow peripherals
— Operates at up to 40 MHz (bus clock) in 1:2 mode or up to 80 MHz (core clock) in 1:1 mode
Three universal asynchronous/synchronous receiver transmitters (UARTs)
— 16-bit divider for clock generation
— Interrupt control logic with maskable interrupts
— DMA support
— Data formats can be 5, 6, 7, or 8 bits with even, odd, or no parity
— Up to two stop bits in 1/16 increments
— Error-detection capabilities
— Modem support includes request-to-send (RTS) and clear-to-send (CTS) lines for two UARTs
— Transmit and receive FIFO buffers
Two I2C modules
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads
— Fully compatible with industry-standard I2C bus
— Master and slave modes support multiple masters
— Automatic interrupt generation with programmable level
Queued serial peripheral interface (QSPI)
— Full-duplex, three-wire synchronous transfers
— Up to three chip selects available
— Master mode operation only
— Programmable bit rates up to half the CPU clock frequency
— Up to 16 pre-programmed transfers
Fast analog-to-digital converter (ADC)
— Eight analog input channels
— 12-bit resolution
— Minimum 1.125
s conversion time
— Simultaneous sampling of two channels for motor control applications
— Single-scan or continuous operation
— Optional interrupts on conversion complete, zero crossing (sign change), or under/over low/high limit
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