参数资料
型号: MCF5275LCVM133
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 133 MHz, RISC PROCESSOR, PBGA196
封装: MAPBGA-196
文件页数: 34/44页
文件大小: 1242K
代理商: MCF5275LCVM133
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2
Preliminary—Subject to Change Without Notice
Features
Freescale Semiconductor
4
3Features
For a detailed feature list see the MCF5275 Reference Manual (MCF5275RM).
4
Signal Descriptions
This section describes signals that connect off chip, including a table of signal properties. For a more
detailed discussion of the MCF5275 signals, consult the MCF5275 Reference Manual (MCF5275RM).
Table 2 lists the signals for the MCF5275 in functional group order. The “Dir” column is the direction for
the primary function of the pin. Refer to Section 6, “Mechanicals/Pinouts,” for package diagrams.
NOTE
In this table and throughout this document a single signal within a group is
designated without square brackets (i.e., A24), while designations for
multiple signals within a group use brackets (i.e., A[23:21]) and is meant to
include all signals within the two bracketed numbers when these numbers
are separated by a colon.
NOTE
The primary functionality of a pin is not necessarily its default functionality.
Pins that are muxed with GPIO will default to their GPIO functionality.
Table 2. MCF5274 and MCF5275 Signal Information and Muxing
Signal Name
GPIO
Alternate1
Alternate2 Dir.1
MCF5274
MCF5275
256 MAPBGA
MCF5274L
MCF5275L
196 MAPBGA
Reset
RESET
——
IN15
K12
RSTOUT
——
ON14
L12
Clock
EXTAL
——
I
L16
M14
XTAL
——
OM16
N14
CLKOUT
——
OT12
P9
Mode Selection
CLKMOD[1:0]
——
I
N13, P13
M11, N11
RCON
——
IP8
M6
External Memory Interface and Ports
A[23:21]
PADDR[7:5]
CS[6:4]
O
A11, B11, C11
A8, B8, C8
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MCF5275CVM133 32-BIT, 133 MHz, RISC PROCESSOR, PBGA256
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