参数资料
型号: MCHC11F1CFNE3R
厂商: Freescale Semiconductor
文件页数: 79/158页
文件大小: 0K
描述: MCU 8BIT 1KRAM 512EE 68-PLCC
标准包装: 250
系列: HC11
核心处理器: HC11
芯体尺寸: 8-位
速度: 3MHz
连通性: SCI,SPI
外围设备: POR,WDT
输入/输出数: 30
程序存储器类型: ROMless
EEPROM 大小: 512 x 8
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.75 V ~ 5.25 V
数据转换器: A/D 8x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 68-LCC(J 形引线)
包装: 带卷 (TR)
CENTRAL PROCESSING UNIT
TECHNICAL DATA
3-3
The add, subtract, and compare instructions associated with both A and B (ABA, SBA,
and CBA) only operate in one direction, making it important to plan ahead to ensure
that the correct operand is in the correct accumulator.
3.1.2 Index Register X (IX)
The IX register provides a 16-bit indexing value that can be added to the 8-bit offset
provided in an instruction to create an effective address. The IX register can also be
used as a counter or as a temporary storage register.
3.1.3 Index Register Y (IY)
The 16-bit IY register performs an indexed mode function similar to that of the IX reg-
ister. However, most instructions using the IY register require an extra byte of machine
code and an extra cycle of execution time because of the way the opcode map is im-
plemented. Refer to 3.3 Opcodes and Operands for further information.
3.1.4 Stack Pointer (SP)
The M68HC11 CPU has an automatic program stack. This stack can be located any-
where in the address space and can be any size up to the amount of memory available
in the system. Normally the SP is initialized by one of the first instructions in an appli-
cation program. The stack is configured as a data structure that grows downward from
high memory to low memory. Each time a new byte is pushed onto the stack, the SP
is decremented. Each time a byte is pulled from the stack, the SP is incremented. At
any given time, the SP holds the 16-bit address of the next free location in the stack.
Figure 3-2 is a summary of SP operations.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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