参数资料
型号: MCIMX31VMN5CR2
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 532 MHz, MICROPROCESSOR, PBGA473
封装: 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, MAPBGA-473
文件页数: 78/122页
文件大小: 1418K
代理商: MCIMX31VMN5CR2
Electrical Characteristics
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Freescale Semiconductor
59
The timing described in Figure 44 is that of a Motorola sensor. Some other sensors may have a slightly
different timing. The CSI can be programmed to support rising/falling-edge triggered SENSB_VSYNC;
active-high/low SENSB_HSYNC; and rising/falling-edge triggered SENSB_PIX_CLK.
4.3.14.3
Electrical Characteristics
Figure 45 depicts the sensor interface timing, and Table 45 lists the timing parameters.
Figure 45. Sensor Interface Timing Diagram
4.3.15
IPUDisplay Interfaces
4.3.15.1
Supported Display Components
Table 46 lists the known supported display components at the time of publication.
Table 45. Sensor Interface Timing Parameters1
1 The timing specifications for Figure 45 are referenced to the rising edge of SENS_PIX_CLK when the
SENS_PIX_CLK_POL bit in the CSI_SENS_CONF register is cleared. When the SENS_PIX_CLK_POL is set,
the clock is inverted and all timing specifications will remain the same but are referenced to the falling edge of
the clock.
ID
Parameter
Symbol
Min.
Max.
Units
IP1
Sensor input clock frequency
Fmck
0.01
133
MHz
IP2
Data and control setup time
Tsu
5
ns
IP3
Data and control holdup time
Thd
3
ns
IP4
Sensor output (pixel) clock frequency
Fpck
0.01
133
MHz
SENSB_MCLK
IP3
SENSB_DATA,
SENSB_VSYNC,
IP2
1/IP1
1/IP4
SENSB_PIX_CLK
(Sensor Input)
(Sensor Output)
SENSB_HSYNC
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family
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