参数资料
型号: MCP1602-120I/MF
厂商: Microchip Technology
文件页数: 11/26页
文件大小: 0K
描述: IC REG BUCK SYNC 1.2V 0.5A 8DFN
标准包装: 120
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 1.2V
输入电压: 2.7 V ~ 5.5 V
频率 - 开关: 2MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-VDFN 裸露焊盘
包装: 管件
供应商设备封装: 8-DFN-EP(3x3)
产品目录页面: 668 (CN2011-ZH PDF)
MCP1602
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 .
TABLE 3-1:
PIN FUNCTION TABLE
MSOP
1
2
3
4
5
6
7
8
DFN
1
2
3
4
5
6
7
8
Exposed
Pad
Sym
SHDN
V CC
PG
A GND
V FB /V OUT
V IN
L X
P GND
EP
Description
Shutdown Input Pin
Analog Input Supply Voltage Pin
Power Good Output Pin
Analog Ground Pin
Feedback Voltage (Adjustable Version) / Output Voltage (Fixed Version) Pin
Input Supply Voltage Pin
Buck Inductor Output Pin
Power Ground Pin
For the DFN package, the center exposed pad is a thermal path to remove
heat from the device. Electrically this pad is at ground potential and should
be connected to A GND
3.1
Shutdown Control Input Pin
3.6
Power Supply Input Voltage Pin
(SHDN)
The SHDN pin is a logic-level input used to enable or
disable the device. A logic high (>45% of V IN ) will
(V IN )
V IN is the buck regulator power input supply pin.
Connect a variable input voltage source to V IN .
enable the regulator output. A logic-low (<15% of V IN )
will ensure that the regulator is disabled.
3.7
Buck Inductor Output Pin (L X )
3.2
Analog Input Supply Voltage Pin
(V CC )
Connect L X directly to the buck inductor. This pin
carries large signal-level current; all connections
should be made as short as possible.
The V CC pin provides bias for internal analog functions.
This voltage is derived by filtering the V IN supply.
3.8
Power Ground Pin (P GND )
3.3
Power-Good Output Pin (PG)
Connect all large signal level ground returns to P GND .
These large signal level ground traces should have a
PG is an output level indicating that the output voltage
is within 94% of regulation. The PG output is configured
as an open-drain output.
3.4 Analog Ground Pin (A GND )
A GND is the analog ground connection. Tie A GND to the
analog portion of the ground plane (A GND ). See the
physical layout information in the Section 5.8 “PCB
Layout Information” section for ground recommenda-
tions.
small loop area and length to prevent coupling of
switching noise to sensitive traces.
3.9 Exposed Metal Pad (EP)
For the DFN package, connect the Exposed Pad to
A GND , with vias into the A GND plane. This connection to
the A GND plane will aid in heat removal from the
package.
3.5
Output Voltage Sense Pin (V FB /
V OUT )
For the adjustable output voltage options, connect the
center of the output voltage divider to the V FB pin. For
fixed-output voltage options, connect the output of the
buck regulator to this pin (V OUT ).
? 2007 Microchip Technology Inc.
DS22061A-page 11
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