参数资料
型号: MCP16323T-500E/NG
厂商: Microchip Technology
文件页数: 13/32页
文件大小: 0K
描述: IC REG BUCK SYNC 5V 3A 16-VQFN
标准包装: 1
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 6 V ~ 18 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-VFQFN 裸露焊盘
包装: 标准包装
供应商设备封装: 16-QFN(3x3)
其它名称: MCP16323T-500E/NGDKR
MCP16323
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 .
TABLE 3-1:
PIN FUNCTION TABLE
MCP16323
3x3 QFN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Symbol
SW
V IN
V IN
SGND
V FB
NC
NC
PG
EN
BOOST
V IN
SW
SW
PGND
PGND
SW
EP
Description
Output switch node, connects to the inductor and the bootstrap capacitor
Input supply voltage pin for power and internal biasing
Input supply voltage pin for power and internal biasing
Primary signal ground
Output voltage feedback pin. Connect V FB to V OUT for fixed version and output
resistor divider for adjustable version.
No Connection
No Connection
Power Good open-drain output, pulled up to a maximum of 6V
Enable input pin. Logic high enables the operation. Internally pulled up, pull EN pin
low to disable regulator ’s output. Maximum voltage on EN input is 6V.
Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor
is connected between the BOOST and SW pins.
Input supply voltage pin for power and internal biasing
Output switch node, connects to the inductor and the bootstrap capacitor
Output switch node, connects to the inductor and the bootstrap capacitor
GND supply for the internal low-side NMOS/integrated diode
GND supply for the internal low-side NMOS/integrated diode
Output switch node, connects to the inductor and the bootstrap capacitor
Exposed Thermal Pad (EP); must be connected to GND
3.1
Switch Pin (SW)
3.3
Signal Ground Pin (S GND )
The drain of the low-side N-Channel switch is
connected internally to the source of the high-side
N-Channel switch, and externally to the SW node
consisting of the inductor and bootstrap capacitor. The
SW node can rise very fast as a result of the internal
high-side switch turning on. It should be connected
directly to the 4.7 μH inductor with a wide, short trace.
3.2 Power Supply Input Voltage Pin
(V IN )
Connect the input voltage source to V IN . The input
source should be decoupled to GND using 2 x 10 μF
This ground is used for the majority of the device,
including the analog reference, control loop, and other
circuits.
3.4 Feedback Voltage Pin (V FB )
The V FB input pin is used to provide output voltage reg-
ulation by either using a resistor divider or V OUT
directly. For the adjustable version, the V FB will be 0.9V
typical with the output voltage in regulation. For the
fixed version, the V FB will be equal to the correspond-
ing V OUT value.
capacitors. The amount of the capacitance depends on
3.5
Power Good Pin (PG)
the impedance of the source and output current. The
input capacitors provide AC current for the high-side
power switch and a stable voltage source for the
internal device power. This capacitor should be
connected as close as possible to the V IN and GND
pins.
? 2011 Microchip Technology Inc.
PG is an open drain, active low output. The regulator
output voltage is monitored and the PG line will remain
low until the output voltage reaches the V OUT-UV
threshold. Once the internal comparator detects that
the output voltage is above the V OUT-UV threshold, an
internal delay timer is activated. After a 10 ms delay,
the PG open drain output pin can be pulled high,
indicating that the output voltage is in regulation. The
maximum voltage applied to the PG output pin should
not exceed 6V.
DS22284A-page 13
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