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| 型号： | MCP1790-5002E/DB |
| 厂商： | Microchip Technology |
| 文件页数： | 17/34页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 5V 70MA SOT-223-3 |
| 标准包装： | 78 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 5V |
| 输入电压： | 6 V ~ 30 V |
| 电压 - 压降（标准）： | 0.7V @ 70mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 70mA（最小） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-261-4，TO-261AA |
| 供应商设备封装： | SOT-223-3 |
| 包装： | 管件 |
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MCP1790/MCP1791
4.9
Power Good Output (PWRGD)
The MCP1791 has an open-drain Power Good
(PWRGD) output signal capable of sinking a minimum
V PWRGD_TH
of 5.0 mA of current while maintaining a PWRGD
output voltage of 0.4V or less.
As the output voltage of the LDO rises, the PWRGD
V OUT
T PG
V PWRGD_HYS
output will be held low until the output voltage has
exceeded the power good threshold (V PWRGD_TH ) level
by an amount equal to the power good hysteresis value
((V PWRGD_HYS ), typically 2% of V R . Once this threshold
has been exceeded, the power good output signal will
PWRGD
30 μs
V ON
T VDET_PWRGD
235 μs
be pulled high by an external pull-up resistor, indicating
that the output voltage is stable and within regulation
limits.
V OL
If the output voltage of the LDO falls below the power
good threshold (V PWRGD_TH ) level, the power good
output will transition low. The power good circuitry has
a 235 μs delay when detecting a falling output voltage,
which helps to increase noise immunity of the power
good output and avoid false triggering of the power
good output during fast output transients. See
When the LDO is put into Shutdown mode using the
SHDN input, the power good output is pulled low within
400 ns typical, indicating that the output voltage will be
out of regulation. The timing diagram for the power
good output when using the shutdown input is shown in
The PWRGD output may be pulled up to either V IN or
V OUT . When pulled to V OUT , the PWRGD output will
sink very little current during shutdown. When PWRGD
is pulled up to V IN , the PWRGD output will sink current
during shutdown. That is because V OUT is 0 during
shutdown while V IN is still active. When the PWRGD
output is pulled to V IN , the PWRGD output signal will
track V IN at startup until the threshold of the PWRGD
circuitry has been reached and the PWRGD circuitry
pulls the signal back low. Therefore, when pulling
PWRGD to V IN instead of V OUT , the designer must be
aware of the PWRGD signal going high while the input
voltage is rising at startup. Pulling PWRGD to V OUT
removes the startup pulse.
? 2010 Microchip Technology Inc.
FIGURE 4-4:
V IN
100 μs
SHDN
V OUT
PWRGD
FIGURE 4-5:
Shutdown.
Power Good Timing.
C LOAD = 1.0 Μ F
T OR
100 μ s
T PG
Power Good Timing from
DS22075B-page 17
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCP1790T-3002E/DB | 功能描述:低压差稳压器 - LDO HI VLTG LDO 50 mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1790T-3002E/EB | 功能描述:低压差稳压器 - LDO HI VLTG LDO 50 mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1790T-3302E/DB | 功能描述:低压差稳压器 - LDO HI VLTG LDO 50 mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1790T-3302E/EB | 功能描述:低压差稳压器 - LDO HI VLTG LDO 50 mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1790T-5002E/DB | 功能描述:低压差稳压器 - LDO HI VLTG LDO 50 mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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