- 您现在的位置：买卖IC网 > PDF目录2097 > MCP3221A5T-E/OT (Microchip Technology)IC ADC 12BIT 2.7V 1CH LP SOT23-5 PDF资料下载
参数资料
| 型号： | MCP3221A5T-E/OT |
| 厂商： | Microchip Technology |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 2.7V 1CH LP SOT23-5 |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 22.3k |
| 数据接口： | I²C，串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 标准包装 |
| 输入数目和类型： | 1 个单端，单极 |
| 产品目录页面： | 672 (CN2011-ZH PDF) |
| 配用： | VSUPEV2-ND - BOARD EVAL FOR MCP4022,4023,4024 MXSIGDM-ND - BOARD DEMO PICTAIL MIXED SIGNAL |
| 其它名称： | MCP3221A5T-E/OTDKR |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
2006 Microchip Technology Inc.
DS21732C-page 15
MCP3221
5.0
SERIAL COMMUNICATIONS
5.1
I2C Bus Characteristics
The following bus protocol has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (refer to Figure 5-1).
5.1.1
BUS NOT BUSY (A)
Both data and clock lines remain high.
5.1.2
START DATA TRANSFER (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a START condition. All
commands must be preceded by a START condition.
5.1.3
STOP DATA TRANSFER (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a STOP condition. All
operations must be ended with a STOP condition.
5.1.4
DATA VALID (D)
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the clock signal’s high period.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
data bytes transferred between the START and STOP
conditions is determined by the master device and is
unlimited.
5.1.5
ACKNOWLEDGE
Each receiving device, when addressed, is obliged to
generate an acknowledge bit after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this acknowledge
bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable-low during the high
period of the acknowledge-related clock pulse. Setup
and hold times must be taken into account. During
reads, a master device must signal an end of data to
the slave by not generating an acknowledge bit on the
last byte that has been clocked out of the slave (NAK).
In this case, the slave (MCP3221) will release the bus
to allow the master device to generate the STOP
condition.
The MCP3221 supports a bidirectional, 2-wire bus and
data transmission protocol. The device that sends data
onto the bus is the transmitter and the device receiving
data is the receiver. The bus has to be controlled by a
master device which generates the serial clock (SCL),
controls the bus access and generates the START and
STOP conditions, while the MCP3221 works as a slave
device. Both master and slave devices can operate as
either transmitter or receiver, but the master device
determines which mode is activated.
FIGURE 5-1:
Data Transfer Sequence on the Serial Bus.
SCL
SDA
(A)
(B)
(D)
(A)
(C)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
相关PDF资料 |
PDF描述 |
|---|---|
| MCP3302-BI/SL | IC ADC 13BIT 2.7V 2CH SPI 14SOIC |
| MCP3421A0T-E/CH | IC ADC 18BIT 3.75SPS 1CH SOT23-6 |
| MCP3421A0T-E/OT | IC ADC 18BIT 3.75SPS 1CH SOT23-6 |
| MCP3424T-E/ST | IC ADC 18BIT 3.75SPS 4CH 14TSSOP |
| MCP3425A0T-E/CH | IC ADC 16BIT I2C PROGBL SOT23-6 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MCP3221A5T-I/OT | 功能描述:模数转换器 - ADC 10-bit I2C Sgl Chl RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MCP3221A5T-I/OT | 制造商:Microchip Technology Inc 功能描述:A/D Converter (A-D) IC |
| MCP3221A5T-I/OT-CUT TAPE | 制造商:Microchip 功能描述:Single Channel I2C Interface 2.7 V 12-Bit A/D Converter SMT - SOT-23-5 |
| MCP3221A6-E/OT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface |
| MCP3221A6-I/OT | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:Low Power 12-Bit A/D Converter With I2C⑩ Interface |
发布紧急采购，3分钟左右您将得到回复。