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| 型号： | MCP3221A5T-E/OT |
| 厂商： | Microchip Technology |
| 文件页数： | 9/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 2.7V 1CH LP SOT23-5 |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 22.3k |
| 数据接口： | I²C，串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 标准包装 |
| 输入数目和类型： | 1 个单端，单极 |
| 产品目录页面： | 672 (CN2011-ZH PDF) |
| 配用： | VSUPEV2-ND - BOARD EVAL FOR MCP4022,4023,4024 MXSIGDM-ND - BOARD DEMO PICTAIL MIXED SIGNAL |
| 其它名称： | MCP3221A5T-E/OTDKR |
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2006 Microchip Technology Inc.
DS21732C-page 17
MCP3221
The input signal will initially be sampled with the first
falling edge of the clock following the transmission of a
logic-high R/W bit. Additionally, with the rising edge of
the SCL, the ADC will transmit an acknowledge bit
(ACK = 0). The master must release the data bus dur-
ing this clock pulse to allow the MCP3221 to pull the
line low (refer to Figure 5-3).
For consecutive samples, sampling begins on the fall-
ing edge of the LSB of the conversion result, which is
two bytes long. Refer to Figure 5-6 a for timing diagram.
5.3.2
READING THE CONVERSION DATA
Once the MCP3221 acknowledges the address byte,
the device will transmit four ‘0’ bits followed by the upper
four data bits of the conversion. The master device will
then acknowledge this byte with an ACK = Low. With the
following 8 clock pulses, the MCP3221 will transmit the
lower eight data bits from the conversion. The master
then sends an ACK = high, indicating to the MCP3221
that no more data is requested. The master can then
send a stop bit to end the transmission.
FIGURE 5-5:
Executing a Conversion.
5.3.3
CONSECUTIVE CONVERSIONS
For consecutive samples, sampling begins on the fall-
ing edge of the LSB of the conversion result. See
Figure 5-6 for timing.
FIGURE 5-6:
Continuous Conversion.
SDA
S
T
A
R
T
S
T
O
P
A
C
K
tACQ + tCONV is
initiated here
Address Byte
Address bits
Device bits
10
0
1
A
R
/
W
Upper Data Byte
00
0
0 D
D
A
C
K
Lower Data Byte
N
A
K
S
P
11 10
2
A
1
A
0
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
12
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
SDA
fSAMP = 22.3 ksps (fCLK = 400 kHz)
A
C
K
tACQ + tCONV is
initiated here
Address Byte
Address bits
Device bits
1
0
1 A2 A1 A0
R
/
W
Upper Data Byte (n)
A
C
K
Lower Data Byte (n)
A
C
K
S
tACQ + tCONV is
initiated here
00
0
0 D
D
11 10 9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
12
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
S
T
A
R
T
0
28
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| MCP3221A5T-I/OT | 功能描述:模数转换器 - ADC 10-bit I2C Sgl Chl RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MCP3221A5T-I/OT | 制造商:Microchip Technology Inc 功能描述:A/D Converter (A-D) IC |
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