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| 型号： | MCP4141T-502E/SN |
| 厂商： | Microchip Technology |
| 文件页数： | 51/88页 |
| 文件大小： | 0K |
| 描述： | IC POT DGTL SNGL 5K SPI 8SOIC |
| 标准包装： | 3,300 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 电阻（欧姆）： | 5k |
| 电路数： | 1 |
| 温度系数： | 标准值 150 ppm/°C |
| 存储器类型： | 易失 |
| 接口： | 3 线 SPI（芯片选择） |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
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2008 Microchip Technology Inc.
DS22059B-page 55
MCP414X/416X/424X/426X
7.8
Decrement Wiper
Normal and High Voltage
The Decrement Command is an 8-bit command. The
Decrement Command can only be issued to volatile
memory locations. The format of the command is
shown in Figure 7-6.
An Decrement Command to the volatile memory
location changes that location after a properly
formatted command (8-clocks) have been received.
Decrement commands provide a quick and easy
method to modify the value of the volatile wiper location
by -1 with minimal overhead.
FIGURE 7-8:
Decrement Command -
SDI and SDO States.
7.8.1
SINGLE DECREMENT
Typically the CS pin starts at the inactive state (VIH), but
may be already be in the active state due to the
completion of another command.
through
show
possible
waveforms for a single Decrement. The decrement
operation requires that the CS pin be in the active state
(VILor VIHH). Typically the CS pin will be in the inactive
state (VIH) and is driven to the active state (VILor VIHH).
Then the 8-bit Decrement Command (Command Byte)
is clocked in on the SDI pin by the SCK pins. The SDO
pin drives the CMDERR bit on the 7th clock.
The wiper value will decrement from the wipers Full
Scale value (100h on 8-bit devices and 80h on 7-bit
devices). Above the wipers Full Scale value
(8-bit =101h to 1FFh, 7-bit = 81h to FFh), the
decrement command is disabled. If the Wiper register
has a Zero Scale value (000h), then the wiper value will
not decrement. See Table 7-4 for additional information
on the Decrement Command vs. the current volatile
wiper value.
The Decrement commands only require the Decrement
command byte, while the CS pin is active (VILor VIHH)
for a single decrement.
After the wiper is decremented to the desired position,
the CS pin should be forced to VIH to ensure that
unexpected transitions on the SCK pin do not cause
the wiper setting to change. Driving the CS pin to VIH
should occur as soon as possible (within device
specifications) after the last desired decrement occurs.
TABLE 7-5:
DECREMENT OPERATION VS.
VOLATILE WIPER VALUE
Note:
Table 7-2 shows the valid addresses for
the Decrement Wiper command. Other
addresses are invalid.
A
D
3
A
D
2
A
D
1
A
D
0
10
X X
111111 1* 1 Note 1, 2
111111
0
0 Note 1, 3
(DECR COMMAND (n+1))
SDI
SDO
COMMAND BYTE
Note 1:
Only functions when writing the volatile
wiper registers (AD3:AD0) 0h and 1h.
2:
Valid Address/Command combination.
3:
Invalid Address/Command combination
all following SDO bits will be low until the
CMDERR condition is cleared.
(the CS pin is forced to the inactive
state).
4:
If a Command Error (CMDERR) occurs
at this bit location (*), then all following
SDO bits will be driven low until the CS
pin is driven inactive (VIH).
Current Wiper
Setting
Wiper (W)
Properties
Decrement
Command
Operates?
7-bit
Pot
8-bit
Pot
3FFh
081h
3FFh
101h
Reserved
(Full-Scale (W = A))
No
080h
100h
Full-Scale (W = A)
Yes
07Fh
041h
0FFh
081
W = N
040h
080h
W = N (Mid-Scale)
Yes
03Fh
001h
07Fh
001
W = N
000h
Zero Scale (W = B)
No
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCP4141T-502I/MF | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/ML | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/MS | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/SL | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
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