参数资料
| 型号： | MCP4728-E/UN |
| 厂商： | Microchip Technology |
| 文件页数： | 19/33页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT W/I2C 10-MSOP |
| 视频文件： | MCP4728 Evaluation Board Demo |
| 标准包装： | 100 |
| 设置时间： | 6µs |
| 位数： | 12 |
| 数据接口： | EEPROM，I²C，串行 |
| 转换器数目： | 4 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 4 电压，单极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4728EV-ND - BOARD EVAL 12BIT 4CH DAC MCP4728 |
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MCP4728
DS22187E-page 26
2010 Microchip Technology Inc.
4.5
Voltage Reference
The device has a precision internal voltage reference
which provides a nominal voltage of 2.048V. The user
can select the internal voltage reference or VDD as the
voltage reference source of each channel using the
VREF configuration bit. The internal voltage reference
circuit is turned off when all channels select VDD as
their references. However, it stays turned on if any one
of the channels selects the internal reference.
4.6
LSB Size
The LSB is defined as the ideal voltage difference
between two successive codes. LSB sizes of the
MCP4728 device are shown in Table 4-4.
4.7
DAC Output Voltage
Each channel has an independent output associated
with its own configuration bit settings and DAC input
code. When the internal voltage reference is selected
(VREF = internal), it supplies the internal VREF voltage
to the resistor string DAC of the channel. When the
external reference (VREF=VDD) is selected, VDD is used
for the channel’s resistor string DAC.
The VDD needs to be as clean as possible for accurate
DAC performance. When the VDD is selected as the
voltage reference, any variation or noises on the VDD
line can directly affect on the DAC output.
The
analog
output
of
each
channel
has
a
programmable gain block. The rail-to-rail output
amplifier has a configurable gain of 1 or 2. But the gain
of 2 is not applicable if VDD is selected for the voltage
reference. The formula for the analog output voltage is
given in Equation 4-1 and Equation 4-2.
4.7.1
OUTPUT VOLTAGE RANGE
The DAC output voltage range varies depending on the
voltage reference selection.
When the internal reference (VREF=2.048V) is
selected:
-VOUT = 0.000V to 2.048V * 4095/4096 for
Gain of 1
-VOUT = 0.000V to 4.096V * 4095/4096 for
Gain of 2
When the external reference (VREF=VDD) is
selected:
-VOUT = 0.000V to VDD
EQUATION 4-1:
VOUT FOR VREF =
INTERNAL REFERENCE
EQUATION 4-2:
VOUT FOR VREF = VDD
4.8
Output Voltage Update
The following events update the output registers
(VOUT):
a.
LDAC pin to “Low”: Updates all DAC channels.
b.
UDAC bit to “Low”: Updates a selected channel
only.
c.
General Call Software Update Command:
Updates all DAC channels.
d.
Power-on
Reset
or
General
Call
Reset
command: Both input and output registers are
updated with EEPROM data. All channels are
affected.
4.8.1
LDAC PIN AND UDAC BIT
The user can use the LDAC pin or UDAC bit to upload
the input DAC register to output DAC register (VOUT).
However, the UDAC affects only the selected channel
while the LDAC affects all channels. The UDAC bit is
not used in the Fast Mode Writing.
Table 4-5 shows the output update vs. LDAC pin and
UDAC bit conditions.
TABLE 4-4:
LSB SIZES (EXAMPLE)
VREF
Gain (GX)
Selection
LSB Size
Condition
Internal
VREF
(2.048V)
x1
0.5 mV
2.048V/4096
x2
1 mV
4.096V/4096
VDD
x1
VDD/4096
Note 1:
LSB size varies with the VDD range.
When VREF = VDD, the device uses
GX = 1 by default. GX = 2 option is
ignored.
Note:
The gain selection bit is not applicable
for VREF = VDD. In this case, Gain of 1
is used regardless of the gain selection
bit setting.
Where:
VREF
=
2.048V for internal reference selection
Dn =
DAC input code
Gx =
Gain Setting
(VREF x Dn )
x
Gx
4096
≤ V
DD
VOUT =
V
OUT
V
DD
D
n
×
()
4096
-----------------------------
=
Where:
Dn
=
DAC input code
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