参数资料
| 型号： | MCP4728-E/UN |
| 厂商： | Microchip Technology |
| 文件页数： | 24/33页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT W/I2C 10-MSOP |
| 视频文件： | MCP4728 Evaluation Board Demo |
| 标准包装： | 100 |
| 设置时间： | 6µs |
| 位数： | 12 |
| 数据接口： | EEPROM，I²C，串行 |
| 转换器数目： | 4 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 4 电压，单极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
| 配用： | MCP4728EV-ND - BOARD EVAL 12BIT 4CH DAC MCP4728 |
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MCP4728
DS22187E-page 30
2010 Microchip Technology Inc.
5.2.5
ACKNOWLEDGE
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse, which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must send an end of
data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (MCP4728) will leave the data
line HIGH to enable the master to generate the STOP
condition.
FIGURE 5-1:
Data Transfer Sequence On The Serial Bus.
5.3
MCP4728 Device Addressing
The address byte is the first byte received following the
START condition from the master device. The first part
of the address byte consists of a 4-bit device code,
which is set to 1100 for the MCP4728 device. The
device code is followed by three I2C address bits (A2,
A1, A0) which are programmable by the users.
Although the three address bits are programmable at
the user’s application PCB, the user can also specify
the address bits during the product ordering process. If
there is no user’s request, the factory default setting of
the three address bits is “000”, programmed into the
EEPROM. The three address bits allow eight unique
addresses.
FIGURE 5-2:
Device Addressing.
5.3.1
PROGRAMMING OF I2C ADDRESS
BITS
When the customer first receives any new MCP4728
device, its default address bit setting is “000” if the
address bit programming was not requested. The
customer can reprogram the I2C address bits into the
EEPROM by using “Write Address Bit” command. This
write command needs current address bits. If the
address bits are unknown, the user can find them by
sending “General Call Read Address” Command. The
LDAC pin is also used to select the device of interest to
be programmed or to read the current address.
The following steps are needed for the I2C address
programming.
(a) Read the address bits using “General Call Read
Address” Command. (This is the case when the
address is unknown.)
(b) Write I2C address bits using “Write I2C Address
Bits” Command.
The Write Address command will replace the current
address with a new address in both input registers and
EEPROM.
See
for the details of reading the address bits, and
bits (C2=0, C1=1, C0=1)” for writing the address bits.
SCL
SDA
(A)
(B)
(D)
(A)
(C)
START
CONDITION
ADDRESS OR
ACKNOWLEDGE
VALID
DATA
ALLOWED
TO CHANGE
STOP
CONDITION
Start bit
Read/Write bit
Address Byte
R/W ACK
Acknowledge bit
Slave Address
110
0
Slave Address for MCP4728
A2
A1
A0
Device Code: Programmed (hard-wired) at the
factory.
Address Bits: Reprogrammable into EEPROM by
the user.
Device Code
Address Bits
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