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| 型号： | MCP4728EV |
| 厂商： | Microchip Technology |
| 文件页数： | 21/33页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL 12BIT 4CH DAC MCP4728 |
| 视频文件： | MCP4728 Evaluation Board Demo |
| 标准包装： | 1 |
| DAC 的数量： | 4 |
| 位数： | 12 |
| 数据接口： | I²C |
| 设置时间： | 6µs |
| DAC 型： | 电压 |
| 工作温度： | -40°C ~ 125°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | MCP4728 |
| 产品目录页面： | 673 (CN2011-ZH PDF) |
| 相关产品： | MCP4728T-E/UN-ND - IC DAC 12BIT W/I2C 10-MSOP MCP4728-E/UN-ND - IC DAC 12BIT W/I2C 10-MSOP |
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MCP4728
DS22187E-page 28
2010 Microchip Technology Inc.
4.10
Normal and Power-Down Modes
Each channel has two modes of operation: (a) Normal
mode where analog voltage is available and (b)
Power-Down mode which turns off most of the internal
circuits for power savings.
The user can select the operating mode of each
channel individually by setting the Power-Down
selection bits (PD1 and PD0). For example, the user
can select Normal mode for channel A while selecting
Power-Down mode for all other channels.
See
Registers and EEPROM” for more details on the
writing the power-down bits.
Most of the internal circuit in the powered down
channel are turned off. However, the internal voltage
reference circuit is not affected by the Power-Down
mode. The internal voltage reference circuit is turned
off only if all channels select external reference (VREF
= VDD).
Device actions during Power-Down mode:
The powered down channel stays in a
power-saving condition by turning off most of its
circuits
No analog voltage output at the powered down
channel
The output (VOUT) pin of the powered down
channel is switched to a known resistive load. The
value of the resistive load is determined by the
state of the Power-Down bits (PD1 and PD0).
Table 4-7 shows the outcome of the Power-Down
bit settings
The contents of both the DAC registers and
EEPROM are not changed
Draws less than 40 nA (typical) when all four
channels are powered down and VDD is selected
as the voltage reference
Circuits that are not affected during Power-Down
mode:
The I2C serial interface circuits remain active in
order to receive any command from the Master
The internal voltage reference circuit stays
turned-on if it is selected as reference by at least
one channel
Exiting Power-Down Mode:
The device exits Power-Down mode immediately by
the following commands:
Any write command for normal mode. Only
selected channel is affected
I2C General Call Wake-Up Command. All
channels are affected
I2C General Call Reset Command. This is a
conditional case. The device exits Power-Down
mode, depending on the Power-Down bit settings
in EEPROM as the configuration bits and DAC
input codes are uploaded from EEPROM. All
channels are affected
When the DAC operation mode is changed from the
Power-Down to Normal mode, there will be a time
delay until the analog output is available. Typical time
delay for the output voltage is approximately 4.5 s.
This time delay is measured from the acknowledge
pulse of the I2C serial communication command to the
beginning of the analog output (VOUT). This time delay
is not included in the output settling time specification.
See
more details.
FIGURE 4-1:
Output Stage for
Power-Down Mode.
TABLE 4-7:
POWER-DOWN BITS
PD1
PD0
Function
00
Normal Mode
01
1k
Ω resistor to ground (Note 1)
10
100 k
Ω resistor to ground
(Note 1)
11
500 k
Ω resistor to ground
(Note 1)
Note 1: In Power-Down mode: V
OUT is off and
most of internal circuits in the selected
channel are disabled.
1k
Ω
100 k
Ω 500 kΩ
Power-Down
Control Circuit
Resistive
Load
VOUT
OP
Amp
Resistor String DAC
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